From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3CF422DCF72 for ; Sun, 14 Dec 2025 08:48:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765702096; cv=none; b=izdvuVChFMmh64bQq08Vh6r/k7yGXXV+Tnh0ESrtJnIAu8Io/MCCh0eQMXlJZgin3Dm+4EAzEMHz0z1m/TvMmcAsuLD7RwQoIYzA5rcrynBcXIsOiYIJqy2AJZbWNC4d6CGgQiMbCgpLYVATjhsR/1jJFVjcx/2MLdAM64gfrFc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765702096; c=relaxed/simple; bh=Zo9VMob+b4paL6k1lrcp+ukEqs0O9NDxbKDF3Of3fM0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=dhzb+Je8s3SIBLWqlEOYYbf1r3cUhuKbz94ussnkskKyC4Wlrzm9DIatn3h6xe+velrpx1Oll01tdYY1v8kJZ8yZL3C2ek4VtPqAnOZ5ezKvAPywPsaJ6a91/l6xc1ih3vup2FdbwS09R1e4HKA5iim9M5zKe8J0hNw3XvjYm64= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=eq40PVG7; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="eq40PVG7" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 97FCCC4CEFB; Sun, 14 Dec 2025 08:48:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1765702094; bh=Zo9VMob+b4paL6k1lrcp+ukEqs0O9NDxbKDF3Of3fM0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eq40PVG70c5hq/oZhJjTTIcfwqws9BfQhmYMH/uQ2n7o8XzmoYHB0q+shVKsDpdhM Kbb74Mxj8H9B15hkzvegrlwz45hHMu3DVcWM85tptYfztJ8dA9mE/Qkkde2fQRfxCI XkCpVrK7daqJb/hoeLwsqi6feuNo7yuzEJgzkOYlPVanSH4RdL8ZPa+uS/xKhYq2// WeHkkGQfeJpWw1NP3hr5W6CcqW4L9B5nkSneK0Lcagr4thO8q6+Fv9sNKUKFoIKQCI a60rvux9P2vq1ueLf0AgXiBIp6PTs+9xWhKUpcb5AJBX/qHUXNzz0QKCDRQ5znF5eO F4WH8MiEWclIA== From: Ingo Molnar To: linux-kernel@vger.kernel.org Cc: Ingo Molnar , "Ahmed S . Darwish" , Andrew Cooper , Ard Biesheuvel , Arnd Bergmann , Borislav Petkov , Dave Hansen , "H . Peter Anvin" , John Ogness , Linus Torvalds , Peter Zijlstra , Thomas Gleixner , Arnd Bergmann Subject: [PATCH 14/15] x86/atomics: Remove !CONFIG_X86_CX8 methods Date: Sun, 14 Dec 2025 09:47:02 +0100 Message-ID: <20251214084710.3606385-15-mingo@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251214084710.3606385-1-mingo@kernel.org> References: <20251214084710.3606385-1-mingo@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Ingo Molnar Acked-by: Dave Hansen Cc: Ahmed S . Darwish Cc: Andrew Cooper Cc: Ard Biesheuvel Cc: Arnd Bergmann Cc: H . Peter Anvin Cc: John Ogness Cc: Linus Torvalds Cc: Peter Zijlstra Link: https://lore.kernel.org/r/20250425084216.3913608-16-mingo@kernel.org --- arch/x86/include/asm/asm-prototypes.h | 4 - arch/x86/include/asm/atomic64_32.h | 17 +-- arch/x86/include/asm/cmpxchg_32.h | 87 +-------------- arch/x86/lib/Makefile | 4 - arch/x86/lib/atomic64_386_32.S | 195 ---------------------------------- arch/x86/lib/cmpxchg8b_emu.S | 97 ----------------- arch/x86/um/Makefile | 1 - lib/atomic64_test.c | 7 +- 8 files changed, 8 insertions(+), 404 deletions(-) diff --git a/arch/x86/include/asm/asm-prototypes.h b/arch/x86/include/asm/asm-prototypes.h index 11c6fecc3ad7..6ec680a36dea 100644 --- a/arch/x86/include/asm/asm-prototypes.h +++ b/arch/x86/include/asm/asm-prototypes.h @@ -16,10 +16,6 @@ #include #include -#ifndef CONFIG_X86_CX8 -extern void cmpxchg8b_emu(void); -#endif - #ifdef CONFIG_STACKPROTECTOR extern unsigned long __ref_stack_chk_guard; #endif diff --git a/arch/x86/include/asm/atomic64_32.h b/arch/x86/include/asm/atomic64_32.h index ab838205c1c6..1ac093b89c43 100644 --- a/arch/x86/include/asm/atomic64_32.h +++ b/arch/x86/include/asm/atomic64_32.h @@ -48,29 +48,14 @@ static __always_inline s64 arch_atomic64_read_nonatomic(const atomic64_t *v) ATOMIC64_EXPORT(atomic64_##sym) #endif -#ifdef CONFIG_X86_CX8 #define __alternative_atomic64(f, g, out, in, clobbers...) \ asm volatile("call %c[func]" \ - : ALT_OUTPUT_SP(out) \ + : ALT_OUTPUT_SP(out) \ : [func] "i" (atomic64_##g##_cx8) \ COMMA(in) \ : clobbers) #define ATOMIC64_DECL(sym) ATOMIC64_DECL_ONE(sym##_cx8) -#else -#define __alternative_atomic64(f, g, out, in, clobbers...) \ - alternative_call(atomic64_##f##_386, atomic64_##g##_cx8, \ - X86_FEATURE_CX8, ASM_OUTPUT(out), \ - ASM_INPUT(in), clobbers) - -#define ATOMIC64_DECL(sym) ATOMIC64_DECL_ONE(sym##_cx8); \ - ATOMIC64_DECL_ONE(sym##_386) - -ATOMIC64_DECL_ONE(add_386); -ATOMIC64_DECL_ONE(sub_386); -ATOMIC64_DECL_ONE(inc_386); -ATOMIC64_DECL_ONE(dec_386); -#endif #define alternative_atomic64(f, out, in, clobbers...) \ __alternative_atomic64(f, f, ASM_OUTPUT(out), ASM_INPUT(in), clobbers) diff --git a/arch/x86/include/asm/cmpxchg_32.h b/arch/x86/include/asm/cmpxchg_32.h index 1f80a62be969..840305da3fc6 100644 --- a/arch/x86/include/asm/cmpxchg_32.h +++ b/arch/x86/include/asm/cmpxchg_32.h @@ -68,88 +68,11 @@ static __always_inline bool __try_cmpxchg64_local(volatile u64 *ptr, u64 *oldp, return __arch_try_cmpxchg64(ptr, oldp, new,); } -#ifdef CONFIG_X86_CX8 +#define arch_cmpxchg64 __cmpxchg64 +#define arch_cmpxchg64_local __cmpxchg64_local +#define arch_try_cmpxchg64 __try_cmpxchg64 +#define arch_try_cmpxchg64_local __try_cmpxchg64_local -#define arch_cmpxchg64 __cmpxchg64 - -#define arch_cmpxchg64_local __cmpxchg64_local - -#define arch_try_cmpxchg64 __try_cmpxchg64 - -#define arch_try_cmpxchg64_local __try_cmpxchg64_local - -#else - -/* - * Building a kernel capable running on 80386 and 80486. It may be necessary - * to simulate the cmpxchg8b on the 80386 and 80486 CPU. - */ - -#define __arch_cmpxchg64_emu(_ptr, _old, _new, _lock_loc, _lock) \ -({ \ - union __u64_halves o = { .full = (_old), }, \ - n = { .full = (_new), }; \ - \ - asm_inline volatile( \ - ALTERNATIVE(_lock_loc \ - "call cmpxchg8b_emu", \ - _lock "cmpxchg8b %a[ptr]", X86_FEATURE_CX8) \ - : ALT_OUTPUT_SP("+a" (o.low), "+d" (o.high)) \ - : "b" (n.low), "c" (n.high), \ - [ptr] "S" (_ptr) \ - : "memory"); \ - \ - o.full; \ -}) - -static __always_inline u64 arch_cmpxchg64(volatile u64 *ptr, u64 old, u64 new) -{ - return __arch_cmpxchg64_emu(ptr, old, new, LOCK_PREFIX_HERE, "lock "); -} -#define arch_cmpxchg64 arch_cmpxchg64 - -static __always_inline u64 arch_cmpxchg64_local(volatile u64 *ptr, u64 old, u64 new) -{ - return __arch_cmpxchg64_emu(ptr, old, new, ,); -} -#define arch_cmpxchg64_local arch_cmpxchg64_local - -#define __arch_try_cmpxchg64_emu(_ptr, _oldp, _new, _lock_loc, _lock) \ -({ \ - union __u64_halves o = { .full = *(_oldp), }, \ - n = { .full = (_new), }; \ - bool ret; \ - \ - asm_inline volatile( \ - ALTERNATIVE(_lock_loc \ - "call cmpxchg8b_emu", \ - _lock "cmpxchg8b %a[ptr]", X86_FEATURE_CX8) \ - : ALT_OUTPUT_SP("=@ccz" (ret), \ - "+a" (o.low), "+d" (o.high)) \ - : "b" (n.low), "c" (n.high), \ - [ptr] "S" (_ptr) \ - : "memory"); \ - \ - if (unlikely(!ret)) \ - *(_oldp) = o.full; \ - \ - likely(ret); \ -}) - -static __always_inline bool arch_try_cmpxchg64(volatile u64 *ptr, u64 *oldp, u64 new) -{ - return __arch_try_cmpxchg64_emu(ptr, oldp, new, LOCK_PREFIX_HERE, "lock "); -} -#define arch_try_cmpxchg64 arch_try_cmpxchg64 - -static __always_inline bool arch_try_cmpxchg64_local(volatile u64 *ptr, u64 *oldp, u64 new) -{ - return __arch_try_cmpxchg64_emu(ptr, oldp, new, ,); -} -#define arch_try_cmpxchg64_local arch_try_cmpxchg64_local - -#endif - -#define system_has_cmpxchg64() boot_cpu_has(X86_FEATURE_CX8) +#define system_has_cmpxchg64() 1 #endif /* _ASM_X86_CMPXCHG_32_H */ diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index 2dba7f83ef97..210af275f468 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -48,10 +48,6 @@ ifeq ($(CONFIG_X86_32),y) lib-y += strstr_32.o lib-y += string_32.o lib-y += memmove_32.o - lib-y += cmpxchg8b_emu.o -ifneq ($(CONFIG_X86_CX8),y) - lib-y += atomic64_386_32.o -endif else ifneq ($(CONFIG_GENERIC_CSUM),y) lib-y += csum-partial_64.o csum-copy_64.o csum-wrappers_64.o diff --git a/arch/x86/lib/atomic64_386_32.S b/arch/x86/lib/atomic64_386_32.S deleted file mode 100644 index e768815e58ae..000000000000 --- a/arch/x86/lib/atomic64_386_32.S +++ /dev/null @@ -1,195 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * atomic64_t for 386/486 - * - * Copyright © 2010 Luca Barbieri - */ - -#include -#include - -/* if you want SMP support, implement these with real spinlocks */ -.macro IRQ_SAVE reg - pushfl - cli -.endm - -.macro IRQ_RESTORE reg - popfl -.endm - -#define BEGIN_IRQ_SAVE(op) \ -.macro endp; \ -SYM_FUNC_END(atomic64_##op##_386); \ -.purgem endp; \ -.endm; \ -SYM_FUNC_START(atomic64_##op##_386); \ - IRQ_SAVE v; - -#define ENDP endp - -#define RET_IRQ_RESTORE \ - IRQ_RESTORE v; \ - RET - -#define v %ecx -BEGIN_IRQ_SAVE(read) - movl (v), %eax - movl 4(v), %edx - RET_IRQ_RESTORE -ENDP -#undef v - -#define v %esi -BEGIN_IRQ_SAVE(set) - movl %ebx, (v) - movl %ecx, 4(v) - RET_IRQ_RESTORE -ENDP -#undef v - -#define v %esi -BEGIN_IRQ_SAVE(xchg) - movl (v), %eax - movl 4(v), %edx - movl %ebx, (v) - movl %ecx, 4(v) - RET_IRQ_RESTORE -ENDP -#undef v - -#define v %ecx -BEGIN_IRQ_SAVE(add) - addl %eax, (v) - adcl %edx, 4(v) - RET_IRQ_RESTORE -ENDP -#undef v - -#define v %ecx -BEGIN_IRQ_SAVE(add_return) - addl (v), %eax - adcl 4(v), %edx - movl %eax, (v) - movl %edx, 4(v) - RET_IRQ_RESTORE -ENDP -#undef v - -#define v %ecx -BEGIN_IRQ_SAVE(sub) - subl %eax, (v) - sbbl %edx, 4(v) - RET_IRQ_RESTORE -ENDP -#undef v - -#define v %ecx -BEGIN_IRQ_SAVE(sub_return) - negl %edx - negl %eax - sbbl $0, %edx - addl (v), %eax - adcl 4(v), %edx - movl %eax, (v) - movl %edx, 4(v) - RET_IRQ_RESTORE -ENDP -#undef v - -#define v %esi -BEGIN_IRQ_SAVE(inc) - addl $1, (v) - adcl $0, 4(v) - RET_IRQ_RESTORE -ENDP -#undef v - -#define v %esi -BEGIN_IRQ_SAVE(inc_return) - movl (v), %eax - movl 4(v), %edx - addl $1, %eax - adcl $0, %edx - movl %eax, (v) - movl %edx, 4(v) - RET_IRQ_RESTORE -ENDP -#undef v - -#define v %esi -BEGIN_IRQ_SAVE(dec) - subl $1, (v) - sbbl $0, 4(v) - RET_IRQ_RESTORE -ENDP -#undef v - -#define v %esi -BEGIN_IRQ_SAVE(dec_return) - movl (v), %eax - movl 4(v), %edx - subl $1, %eax - sbbl $0, %edx - movl %eax, (v) - movl %edx, 4(v) - RET_IRQ_RESTORE -ENDP -#undef v - -#define v %esi -BEGIN_IRQ_SAVE(add_unless) - addl %eax, %ecx - adcl %edx, %edi - addl (v), %eax - adcl 4(v), %edx - cmpl %eax, %ecx - je 3f -1: - movl %eax, (v) - movl %edx, 4(v) - movl $1, %eax -2: - RET_IRQ_RESTORE -3: - cmpl %edx, %edi - jne 1b - xorl %eax, %eax - jmp 2b -ENDP -#undef v - -#define v %esi -BEGIN_IRQ_SAVE(inc_not_zero) - movl (v), %eax - movl 4(v), %edx - testl %eax, %eax - je 3f -1: - addl $1, %eax - adcl $0, %edx - movl %eax, (v) - movl %edx, 4(v) - movl $1, %eax -2: - RET_IRQ_RESTORE -3: - testl %edx, %edx - jne 1b - jmp 2b -ENDP -#undef v - -#define v %esi -BEGIN_IRQ_SAVE(dec_if_positive) - movl (v), %eax - movl 4(v), %edx - subl $1, %eax - sbbl $0, %edx - js 1f - movl %eax, (v) - movl %edx, 4(v) -1: - RET_IRQ_RESTORE -ENDP -#undef v diff --git a/arch/x86/lib/cmpxchg8b_emu.S b/arch/x86/lib/cmpxchg8b_emu.S deleted file mode 100644 index d4bb24347ff8..000000000000 --- a/arch/x86/lib/cmpxchg8b_emu.S +++ /dev/null @@ -1,97 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include -#include -#include -#include - -.text - -#ifndef CONFIG_X86_CX8 - -/* - * Emulate 'cmpxchg8b (%esi)' on UP - * - * Inputs: - * %esi : memory location to compare - * %eax : low 32 bits of old value - * %edx : high 32 bits of old value - * %ebx : low 32 bits of new value - * %ecx : high 32 bits of new value - */ -SYM_FUNC_START(cmpxchg8b_emu) - - pushfl - cli - - cmpl (%esi), %eax - jne .Lnot_same - cmpl 4(%esi), %edx - jne .Lnot_same - - movl %ebx, (%esi) - movl %ecx, 4(%esi) - - orl $X86_EFLAGS_ZF, (%esp) - - popfl - RET - -.Lnot_same: - movl (%esi), %eax - movl 4(%esi), %edx - - andl $(~X86_EFLAGS_ZF), (%esp) - - popfl - RET - -SYM_FUNC_END(cmpxchg8b_emu) -EXPORT_SYMBOL(cmpxchg8b_emu) - -#endif - -#ifndef CONFIG_UML - -/* - * Emulate 'cmpxchg8b %fs:(%rsi)' - * - * Inputs: - * %esi : memory location to compare - * %eax : low 32 bits of old value - * %edx : high 32 bits of old value - * %ebx : low 32 bits of new value - * %ecx : high 32 bits of new value - * - * Notably this is not LOCK prefixed and is not safe against NMIs - */ -SYM_FUNC_START(this_cpu_cmpxchg8b_emu) - - pushfl - cli - - cmpl __percpu (%esi), %eax - jne .Lnot_same2 - cmpl __percpu 4(%esi), %edx - jne .Lnot_same2 - - movl %ebx, __percpu (%esi) - movl %ecx, __percpu 4(%esi) - - orl $X86_EFLAGS_ZF, (%esp) - - popfl - RET - -.Lnot_same2: - movl __percpu (%esi), %eax - movl __percpu 4(%esi), %edx - - andl $(~X86_EFLAGS_ZF), (%esp) - - popfl - RET - -SYM_FUNC_END(this_cpu_cmpxchg8b_emu) - -#endif diff --git a/arch/x86/um/Makefile b/arch/x86/um/Makefile index f9ea75bf43ac..2513aca5156a 100644 --- a/arch/x86/um/Makefile +++ b/arch/x86/um/Makefile @@ -20,7 +20,6 @@ ifeq ($(CONFIG_X86_32),y) obj-y += syscalls_32.o subarch-y = ../lib/string_32.o ../lib/atomic64_32.o ../lib/atomic64_cx8_32.o -subarch-y += ../lib/cmpxchg8b_emu.o ../lib/atomic64_386_32.o subarch-y += ../lib/checksum_32.o subarch-y += ../kernel/sys_ia32.o diff --git a/lib/atomic64_test.c b/lib/atomic64_test.c index d726068358c7..d7697c09041f 100644 --- a/lib/atomic64_test.c +++ b/lib/atomic64_test.c @@ -251,15 +251,12 @@ static __init int test_atomics_init(void) test_atomic64(); #ifdef CONFIG_X86 - pr_info("passed for %s platform %s CX8 and %s SSE\n", + pr_info("passed for %s platform with CX8 and %s SSE\n", #ifdef CONFIG_X86_64 "x86-64", -#elif defined(CONFIG_X86_CX8) - "i586+", #else - "i386+", + "i586+", #endif - boot_cpu_has(X86_FEATURE_CX8) ? "with" : "without", boot_cpu_has(X86_FEATURE_XMM) ? "with" : "without"); #else pr_info("passed\n"); -- 2.51.0