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Sun, 14 Dec 2025 14:52:06 -0500 (EST) Date: Mon, 15 Dec 2025 04:52:03 +0900 From: Alex Williamson To: Ajay Garg Cc: iommu@lists.linux-foundation.org, linux-pci@vger.kernel.org, Linux Kernel Mailing List Subject: Re: A lingering doubt on PCI-MMIO region of PCI-passthrough-device Message-ID: <20251215045203.13d96d09.alex@shazbot.org> In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Sun, 14 Dec 2025 17:38:50 +0530 Ajay Garg wrote: > Hi everyone. > > Let's assume x86_64-linux host and guest, with full-virtualization and > iommu hardware capabilities. > > Before launching vm, qemu with the help vfio "installs" "dev1" on the > virtual-pci-root-complex of guest. > After bootup, the guest does the usual enumeration, finds "dev1" on > the pci-bus, and programs the BARs in its domain. > > However, there is no guarantee that guest-pci-mmio-physical-ranges > would be identical to "what would have been" > host-pci-mmio-physical-ranges. > Then how does the EPT/SLAT tables get set up for correct mapping from > GPA => HPA for dev1's-BARs-MMIO-regions ? The guest doesn't get to program the device physical BARs, nor does it require identity mapping in the guest. The BAR programming is virtualized. QEMU mmaps the BAR and that mmap is the backing for the mapping into the guest. Thanks, Alex