From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail58.out.titan.email (mail58.out.titan.email [209.209.25.108]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E867526CE0A for ; Tue, 16 Dec 2025 18:11:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.209.25.108 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765908670; cv=none; b=GGPhTxLwdtaTSQ4B+auHmI8CrcYdugiwnrs3NfPRNkxyMkLCABcqi/xqe1wrGSJulFLSU3f9Rw3sHlZe5RbmCPVYyDstdpVKMMFud616sD/VK3uM0ZooQrpK28EzQUNYbocjOPTy1CF0x30G67qmkIN8B+YRbDbD+bbIKIrhpVE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765908670; c=relaxed/simple; bh=hOAELr1SbyFdrRZKqqH9tYSs1PQb5SiwoFbqCpZA16A=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=LcIdYdolEF3ytCAJhcTLS2UzIun+N6bn6hF2eTwWtJgq6N3ywXzhh6lpL3D5LAgLTa5L3s0KO9Mpc+DCgdZM/RpW+g6zZ1Im2SyIFOaKqS2d8OdkHovszBWw7KsbiMCL2VoF+Kwc/mACDVdzc5UzRHrlQqtXGatbBQRuLdMwQ6A= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ziyao.cc; spf=pass smtp.mailfrom=ziyao.cc; dkim=pass (1024-bit key) header.d=ziyao.cc header.i=@ziyao.cc header.b=XXFPQcqO; arc=none smtp.client-ip=209.209.25.108 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ziyao.cc Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ziyao.cc Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ziyao.cc header.i=@ziyao.cc header.b="XXFPQcqO" Received: from localhost (localhost [127.0.0.1]) by smtp-out.flockmail.com (Postfix) with ESMTP id 4dW4Yc6fVrz2xNL; Tue, 16 Dec 2025 18:03:48 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=GV2A9UYZpm76JOR64rfGMGeMqfOafCEpkSbYbKmS72M=; c=relaxed/relaxed; d=ziyao.cc; h=cc:subject:date:to:from:message-id:mime-version:from:to:cc:subject:date:message-id:in-reply-to:reply-to:references; q=dns/txt; s=titan1; t=1765908228; v=1; b=XXFPQcqO63cvoqaUEH4LdSAy9PtmZOqCIjNDwKEaq8gNtXV6gjYXxVQBlPtv1MaMu6v7a3Q1 OBACEdRhrZob9WjK9A/FF4p1uZr9JjfcEak6QTtRSrz4pelZ4/mo+g4nEdNVPt3RXkQPp9ygYDD uqxr9c5Hx/cKHgUoegqs/BJc= Received: from ketchup (unknown [117.171.66.90]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp-out.flockmail.com (Postfix) with ESMTPSA id 4dW4YW2HyZz2xMb; Tue, 16 Dec 2025 18:03:42 +0000 (UTC) Feedback-ID: :me@ziyao.cc:ziyao.cc:flockmailId From: Yao Zi To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Frank , Heiner Kallweit , Russell King , "Russell King (Oracle)" , Vladimir Oltean , Choong Yong Liang , Chen-Yu Tsai , Jisheng Zhang , Furong Xu <0x1207@gmail.com> Cc: linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Mingcong Bai , Kexy Biscuit , Yao Zi Subject: [RFC PATCH net-next v4 0/3] Add DWMAC glue driver for Motorcomm YT6801 Date: Tue, 16 Dec 2025 18:03:28 +0000 Message-ID: <20251216180331.61586-1-me@ziyao.cc> X-Mailer: git-send-email 2.51.2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-F-Verdict: SPFVALID X-Titan-Src-Out: 1765908228737617314.27573.2953753068898638043@prod-use1-smtp-out1001. X-CMAE-Score: 0 X-CMAE-Analysis: v=2.4 cv=a8/K9VSF c=1 sm=1 tr=0 ts=69419f04 a=rBp+3XZz9uO5KTvnfbZ58A==:117 a=rBp+3XZz9uO5KTvnfbZ58A==:17 a=MKtGQD3n3ToA:10 a=1oJP67jkp3AA:10 a=CEWIc4RMnpUA:10 a=VwQbUJbxAAAA:8 a=PHq6YzTAAAAA:8 a=NfpvoiIcAAAA:8 a=NEAV23lmAAAA:8 a=LpNgXrTXAAAA:8 a=rXHHX5KNNKQTorzD0jcA:9 a=ZKzU8r6zoKMcqsNulkmm:22 a=HwjPHhrhEcEjrsLHunKI:22 a=LqOpv0_-CX5VL_7kjZO3:22 a=3z85VNIBY5UIEeAh_hcH:22 a=NWVoK91CQySWRX1oVYDe:22 This series adds glue driver for Motorcomm YT6801 PCIe ethernet controller, which is considered mostly compatible with DWMAC-4 IP by inspecting the register layout[1]. It integrates a Motorcomm YT8531S PHY (confirmed by reading PHY ID) and GMII is used to connect the PHY to MAC[2]. The initialization logic of the MAC is mostly based on previous upstream effort for the controller[3] and the Deepin-maintained downstream Linux driver[4] licensed under GPL-2.0 according to its SPDX headers. However, this series is a completely re-write of the previous patch series, utilizing the existing DWMAC4 driver and introducing a glue driver only. This series only aims to add basic networking functions for the controller, features like WoL, RSS and LED control are omitted for now. Testing is done on Loongson 3A5000 machine. Through a local GbE switch, it reaches 872Mbps (TX)/942Mbps (RX) on average, YT6801 TX Connecting to host 172.16.70.12, port 5201 [ 5] local 172.16.70.230 port 53658 connected to 172.16.70.12 port 5201 [ ID] Interval Transfer Bitrate Retr Cwnd [ 5] 0.00-1.00 sec 104 MBytes 869 Mbits/sec 0 533 KBytes [ 5] 1.00-2.00 sec 104 MBytes 875 Mbits/sec 0 533 KBytes [ 5] 2.00-3.00 sec 104 MBytes 874 Mbits/sec 0 533 KBytes [ 5] 3.00-4.00 sec 104 MBytes 870 Mbits/sec 0 533 KBytes [ 5] 4.00-5.00 sec 104 MBytes 874 Mbits/sec 0 533 KBytes [ 5] 5.00-6.00 sec 104 MBytes 874 Mbits/sec 0 533 KBytes [ 5] 6.00-7.00 sec 104 MBytes 870 Mbits/sec 0 533 KBytes [ 5] 7.00-8.00 sec 103 MBytes 866 Mbits/sec 0 533 KBytes [ 5] 8.00-9.00 sec 104 MBytes 872 Mbits/sec 0 533 KBytes [ 5] 9.00-10.00 sec 104 MBytes 871 Mbits/sec 0 533 KBytes YT6801 RX Connecting to host 172.16.70.230, port 5201 [ 5] local 172.16.70.12 port 45596 connected to 172.16.70.230 port 5201 [ ID] Interval Transfer Bitrate Retr Cwnd [ 5] 0.00-1.00 sec 114 MBytes 955 Mbits/sec 0 427 KBytes [ 5] 1.00-2.00 sec 112 MBytes 942 Mbits/sec 0 427 KBytes [ 5] 2.00-3.00 sec 112 MBytes 937 Mbits/sec 0 427 KBytes [ 5] 3.00-4.00 sec 112 MBytes 940 Mbits/sec 0 427 KBytes [ 5] 4.00-5.00 sec 113 MBytes 945 Mbits/sec 0 427 KBytes [ 5] 5.00-6.00 sec 112 MBytes 940 Mbits/sec 0 427 KBytes [ 5] 6.00-7.00 sec 113 MBytes 947 Mbits/sec 0 427 KBytes [ 5] 7.00-8.00 sec 112 MBytes 935 Mbits/sec 0 427 KBytes [ 5] 8.00-9.00 sec 113 MBytes 945 Mbits/sec 0 427 KBytes [ 5] 9.00-10.00 sec 112 MBytes 938 Mbits/sec 0 427 KBytes Thanks for your time and review. [1]: https://lore.kernel.org/all/Z_T6vv013jraCzSD@shell.armlinux.org.uk/ [2]: https://lore.kernel.org/all/a48d76ac-db08-46d5-9528-f046a7b541dc@motor-comm.com/ [3]: https://lore.kernel.org/all/a48d76ac-db08-46d5-9528-f046a7b541dc@motor-comm.com/ [4]: https://github.com/deepin-community/kernel/tree/dc61248a0e21/drivers/net/ethernet/motorcomm/yt6801 Changed from v3 - Manually register a devres action to call pci_free_irq_vectors(), instead of relying on the obsolete behavior of pci_alloc_irq_vectors(). - Remove redundant call to pci_free_irq_vectors() in remove callback. - Use my new mail address me@ziyao.cc for Sign-off-by and commit author. - Link to v3: https://lore.kernel.org/netdev/20251124163211.54994-1-ziyao@disroot.org/ Changed from v2 - Rebase on top of next-20251124 - Switch to stmmac_plat_dat_alloc() then drop now redundant parameters from motorcomm_default_plat_data() - Set STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP - Add a comment indicating the possible source of CSR clock - Link to v2: https://lore.kernel.org/netdev/20251111105252.53487-1-ziyao@disroot.org/ Changed from v1 - Drop (original) PATCH 1, add no vendor ID entry to linux/pci_ids.h - Use PHY_INTERFACE_MODE_GMII instead of PHY_INTERFACE_MODE_INTERNAL - Drop extra register read in motorcomm_efuse_read_byte() - Rename EPHY_RESET to EPHY_MDIO_PHY_RESET, add a comment to reflect its function better - Use the newly-introduced generic PCI suspend/resume routines - Generate a random MAC address instead of failing to probe when no MAC address is programmed in eFuse (seen on some OEM EVBs). - Collect Tested-by tags - Link to v1: https://lore.kernel.org/netdev/20251014164746.50696-2-ziyao@disroot.org/ Yao Zi (3): net: phy: motorcomm: Support YT8531S PHY in YT6801 Ethernet controller net: stmmac: Add glue driver for Motorcomm YT6801 ethernet controller MAINTAINERS: Assign myself as maintainer of Motorcomm DWMAC glue driver MAINTAINERS | 6 + drivers/net/ethernet/stmicro/stmmac/Kconfig | 9 + drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + .../ethernet/stmicro/stmmac/dwmac-motorcomm.c | 383 ++++++++++++++++++ drivers/net/phy/motorcomm.c | 4 + 5 files changed, 403 insertions(+) create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c -- 2.51.2