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Fri, 19 Dec 2025 19:06:41 -0500 (EST) Date: Fri, 19 Dec 2025 17:06:37 -0700 From: Alex Williamson To: Ajay Garg Cc: QEMU Developers , iommu@lists.linux-foundation.org, linux-pci@vger.kernel.org, Linux Kernel Mailing List Subject: Re: A lingering doubt on PCI-MMIO region of PCI-passthrough-device Message-ID: <20251219170637.2c161b7b.alex@shazbot.org> In-Reply-To: References: <20251215045203.13d96d09.alex@shazbot.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On Fri, 19 Dec 2025 11:53:56 +0530 Ajay Garg wrote: > Hi Alex. > Kindly help if the steps listed in the previous email are correct. >=20 > (Have added qemu mailing-list too, as it might be a qemu thing too as > virtual-pci is in picture). >=20 > On Mon, Dec 15, 2025 at 9:20=E2=80=AFAM Ajay Garg wrote: > > > > Thanks Alex. > > > > So does something like the following happen : > > > > i) > > During bootup, guest starts pci-enumeration as usual. > > > > ii) > > Upon discovering the "passthrough-device", guest carves the physical > > MMIO regions (as usual) in the guest's physical-address-space, and > > starts-to/attempts to program the BARs with the > > guest-physical-base-addresses carved out. > > > > iii) > > These attempts to program the BARs (lying in the > > "passthrough-device"'s config-space), are intercepted by the > > hypervisor instead (causing a VM-exit in the interim). > > > > iv) > > The hypervisor uses the above info to update the EPT, to ensure GPA =3D> > > HPA conversions go fine when the guest tries to access the PCI-MMIO > > regions later (once gurst is fully booted up). Also, the hypervisor > > marks the operation as success (without "really" re-programming the > > BARs). > > > > v) > > The VM-entry is called, and the guest resumes with the "impression" > > that the BARs have been "programmed by guest". > > > > Is the above sequencing correct at a bird's view level? It's not far off. The key is simply that we can create a host virtual mapping to the device BARs, ie. an mmap. The guest enumerates emulated BARs, they're only used for sizing and locating the BARs in the guest physical address space. When the guest BAR is programmed and memory enabled, the address space in QEMU is populated at the BAR indicated GPA using the mmap backing. KVM memory slots are used to fill the mappings in the vCPU. The same BAR mmap is also used to provide DMA mapping of the BAR through the IOMMU in the legacy type1 IOMMU backend case. Barring a vIOMMU, the IOMMU IOVA space is the guest physical address space. Thanks, Alex