[RFC v2 03/15] cxl: introduce cxl_find_comp_reglock_offset()

mhonap
2025-12-09T16:51:41Z

From: Zhi Wang <zhiw@nvidia.com>

CXL core has the information of what CXL register groups a device
has.When initializing the device, the CXL core probes the register
groups and saves the information. The probing sequence is quite
complicated.

vfio-cxl needs to handle the CXL MMIO BAR specially. E.g. emulate
the HDM decoder register inside the component registers. Thus it
requires to know the offset of the CXL component register to locate
the PCI BAR where the component register sits.

Introduce cxl_find_comp_regblock_offset() for vfio-cxl to leverage the
register information in the CXL core. Thus, it doesn't need to
implement its own probing sequence.

Signed-off-by: Zhi Wang <zhiw@nvidia.com>
Signed-off-by: Manish Honap <mhonap@nvidia.com>
---
drivers/cxl/core/regs.c | 22 ++++++++++++++++++++++
include/cxl/cxl.h | 2 ++
2 files changed, 24 insertions(+)

diff --git a/drivers/cxl/core/regs.c b/drivers/cxl/core/regs.c
index dcf444f1fe48..c5f31627fa20 100644
--- a/drivers/cxl/core/regs.c
+++ b/drivers/cxl/core/regs.c
@@ -345,6 +345,28 @@ static int __cxl_find_regblock_instance(struct pci_dev *pdev, enum cxl_regloc_ty
return -ENODEV;
}

+/**
+ * cxl_find_comp_regblock_offset() - Locate the offset of component
+ * register blocks
+ * @pdev: The CXL PCI device to enumerate.
+ * @offset: Enumeration output, clobbered on error
+ *
+ * Return: 0 if register block enumerated, negative error code otherwise
+ */
+int cxl_find_comp_regblock_offset(struct pci_dev *pdev, u64 *offset)
+{
+ struct cxl_register_map map;
+ int ret;
+
+ ret = cxl_find_regblock(pdev, CXL_REGLOC_RBI_COMPONENT, &map);
+ if (ret)
+ return ret;
+
+ *offset = map.resource;
+ return 0;
+}
+EXPORT_SYMBOL_NS_GPL(cxl_find_comp_regblock_offset, "CXL");
+
/**
* cxl_find_regblock_instance() - Locate a register block by type / index
* @pdev: The CXL PCI device to enumerate.
diff --git a/include/cxl/cxl.h b/include/cxl/cxl.h
index d84405afc72e..28a39bfd74bc 100644
--- a/include/cxl/cxl.h
+++ b/include/cxl/cxl.h
@@ -7,6 +7,7 @@

#include <linux/node.h>
#include <linux/ioport.h>
+#include <linux/pci.h>
#include <linux/range.h>
#include <cxl/mailbox.h>

@@ -292,5 +293,6 @@ int cxl_get_region_range(struct cxl_region *region, struct range *range);

int cxl_get_hdm_reg_info(struct cxl_dev_state *cxlds, u64 *count, u64 *offset,
u64 *size);
+int cxl_find_comp_regblock_offset(struct pci_dev *pdev, u64 *offset);

#endif /* __CXL_CXL_H__ */
--
2.25.1