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X-CSE-ConnectionGUID: oKybEaA3RSm3dRyUykXZXw== X-CSE-MsgGUID: RX6HUUfeTVm0KRxLTe3GTw== X-IronPort-AV: E=McAfee;i="6800,10657,11651"; a="68436652" X-IronPort-AV: E=Sophos;i="6.21,172,1763452800"; d="scan'208";a="68436652" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa108.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Dec 2025 20:52:02 -0800 X-CSE-ConnectionGUID: MzfcDTNCQTuIgRjI6Asbzw== X-CSE-MsgGUID: iQ5tRVbhR82c18FGlq+9HQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,172,1763452800"; d="scan'208";a="199692590" Received: from lkp-server02.sh.intel.com (HELO dd3453e2b682) ([10.239.97.151]) by orviesa009.jf.intel.com with ESMTP; 23 Dec 2025 20:52:00 -0800 Received: from kbuild by dd3453e2b682 with local (Exim 4.98.2) (envelope-from ) id 1vYGqn-000000002gj-2Mjn; Wed, 24 Dec 2025 04:51:53 +0000 Date: Wed, 24 Dec 2025 12:51:17 +0800 From: kernel test robot To: Ilya Bakoulin Cc: oe-kbuild-all@lists.linux.dev, linux-kernel@vger.kernel.org, Alex Deucher , Alvin Lee , Aurabindo Pillai Subject: drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c:3494:82: sparse: sparse: Using plain integer as NULL pointer Message-ID: <202512241240.tF5GyPW8-lkp@intel.com> User-Agent: s-nail v14.9.25 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: b927546677c876e26eba308550207c2ddf812a43 commit: f96012baa5d3b4336092855e4e6d24830ea50736 drm/amd/display: add new block sequence-building/executing functions date: 9 weeks ago config: i386-randconfig-063-20251221 (https://download.01.org/0day-ci/archive/20251224/202512241240.tF5GyPW8-lkp@intel.com/config) compiler: gcc-14 (Debian 14.2.0-19) 14.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251224/202512241240.tF5GyPW8-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Closes: https://lore.kernel.org/oe-kbuild-all/202512241240.tF5GyPW8-lkp@intel.com/ sparse warnings: (new ones prefixed by >>) >> drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c:3494:82: sparse: sparse: Using plain integer as NULL pointer vim +3494 drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c 3458 3459 void dcn401_post_unlock_reset_opp_sequence( 3460 struct dc *dc, 3461 struct pipe_ctx *opp_head, 3462 struct block_sequence_state *seq_state) 3463 { 3464 struct display_stream_compressor *dsc = opp_head->stream_res.dsc; 3465 struct dccg *dccg = dc->res_pool->dccg; 3466 3467 /* Wait for all DPP pipes in current mpc blending tree completes double 3468 * buffered disconnection before resetting OPP 3469 */ 3470 if (dc->hwss.wait_for_mpcc_disconnect_sequence) 3471 dc->hwss.wait_for_mpcc_disconnect_sequence(dc, dc->res_pool, opp_head, seq_state); 3472 3473 if (dsc) { 3474 bool *is_ungated = NULL; 3475 /* Check DSC power gate status */ 3476 if (dc->hwseq && dc->hwseq->funcs.dsc_pg_status) { 3477 hwss_add_dsc_pg_status(seq_state, dc->hwseq, dsc->inst, false); 3478 } 3479 3480 /* Seamless update specific where we will postpone non 3481 * double buffered DSCCLK disable logic in post unlock 3482 * sequence after DSC is disconnected from OPP but not 3483 * yet power gated. 3484 */ 3485 3486 /* DSC wait disconnect pending clear */ 3487 hwss_add_dsc_wait_disconnect_pending_clear(seq_state, dsc, is_ungated); 3488 3489 /* DSC disable */ 3490 hwss_add_dsc_disable(seq_state, dsc, is_ungated); 3491 3492 /* Set reference DSCCLK */ 3493 if (dccg && dccg->funcs->set_ref_dscclk) { > 3494 hwss_add_dccg_set_ref_dscclk(seq_state, dccg, dsc->inst, 0); 3495 } 3496 } 3497 } 3498 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki