From: Jonathan Cameron <jonathan.cameron@huawei.com>
To: Lorenzo Pieralisi <lpieralisi@kernel.org>
Cc: "Rafael J. Wysocki" <rafael@kernel.org>,
Len Brown <lenb@kernel.org>,
Robert Moore <robert.moore@intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
Hanjun Guo <guohanjun@huawei.com>,
Sudeep Holla <sudeep.holla@arm.com>,
Marc Zyngier <maz@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>, <linux-acpi@vger.kernel.org>,
<acpica-devel@lists.linux.dev>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-pci@vger.kernel.org>
Subject: Re: [PATCH v2 6/7] irqchip/gic-v5: Add ACPI ITS probing
Date: Mon, 5 Jan 2026 13:55:45 +0000 [thread overview]
Message-ID: <20260105135545.00003a59@huawei.com> (raw)
In-Reply-To: <20251218-gicv5-host-acpi-v2-6-eec76cd1d40b@kernel.org>
On Thu, 18 Dec 2025 11:14:32 +0100
Lorenzo Pieralisi <lpieralisi@kernel.org> wrote:
> On ACPI ARM64 systems the GICv5 ITS configuration and translate frames
> are described in the MADT table.
>
> Refactor the current GICv5 ITS driver code to share common functions
> between ACPI and OF and implement ACPI probing in the GICv5 ITS driver.
>
> Add iort_msi_xlate() to map a device ID and retrieve an MSI controller
> fwnode node for ACPI systems and update pci_msi_map_rid_ctlr_node() to
> use it in its ACPI code path.
>
> Add the required functions to IORT code for deviceID retrieval and IRQ
> domain registration and look-up so that the GICv5 ITS driver in an
> ACPI based system can be successfully probed.
>
> Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Hanjun Guo <guohanjun@huawei.com>
> Cc: Sudeep Holla <sudeep.holla@arm.com>
> Cc: Marc Zyngier <maz@kernel.org>
Hi Lorenzo,
Diff was in a rather unfriendly mood on this one and smashing the xlate
on top of the wrong function (wrt to what was being replaced).
Ah well. Only one minor comment inline. Not really my area of expertise
beyond wanting this to move forwards quickly but none the less,
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> ---
> drivers/acpi/arm64/iort.c | 95 +++++++++++++++++-----
> drivers/irqchip/irq-gic-its-msi-parent.c | 39 ++++-----
> drivers/irqchip/irq-gic-v5-irs.c | 7 +-
> drivers/irqchip/irq-gic-v5-its.c | 132 ++++++++++++++++++++++++++++++-
> drivers/pci/msi/irqdomain.c | 2 +
> include/linux/acpi_iort.h | 10 ++-
> include/linux/irqchip/arm-gic-v5.h | 1 +
> 7 files changed, 241 insertions(+), 45 deletions(-)
>
> diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
> index 65f0f56ad753..17dbe66da804 100644
> --- a/drivers/acpi/arm64/iort.c
> +++ b/drivers/acpi/arm64/iort.c
> @@ -595,45 +595,45 @@ u32 iort_msi_map_id(struct device *dev, u32 input_id)
> }
>
> +/**
> + * iort_pmsi_get_msi_info() - Get the device id and translate frame PA for a device
> + * @dev: The device for which the mapping is to be done.
> + * @dev_id: The device ID found.
> + * @pa: optional pointer to store translate frame address.
> + *
> + * Returns: 0 for successful devid and pa retrieval, -ENODEV on error
> + */
> +int iort_pmsi_get_msi_info(struct device *dev, u32 *dev_id, phys_addr_t *pa)
> +{
> + struct acpi_iort_node *node, *parent = NULL;
> + struct acpi_iort_its_group *its;
> + int i, index;
> +
> + node = iort_find_dev_node(dev);
> + if (!node)
> + return -ENODEV;
> +
> + index = iort_get_id_mapping_index(node);
> + /* if there is a valid index, go get the dev_id directly */
> + if (index >= 0) {
> + parent = iort_node_get_id(node, dev_id, index);
> + } else {
> + for (i = 0; i < node->mapping_count; i++) {
> + parent = iort_node_map_platform_id(node, dev_id,
> + IORT_MSI_TYPE, i);
> + if (parent)
> + break;
> + }
> + }
> +
Another borderline comment on what I think is a small readabilty
improvement.
I'd handle the only error case that would otherwise use the ternary below
here
if (!parent)
return -ENODEV;
if (pa) {
...
}
return 0;
> + if (parent && pa) {
> + int ret;
> +
> + its = (struct acpi_iort_its_group *)node->node_data;
> + ret = iort_find_its_base(its->identifiers[0], pa);
> + if (ret)
> + return ret;
> + }
> +
> + return parent ? 0 : -ENODEV;
> +}
next prev parent reply other threads:[~2026-01-05 13:55 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-18 10:14 [PATCH v2 0/7] irqchip/gic-v5: Code first ACPI boot support Lorenzo Pieralisi
2025-12-18 10:14 ` [PATCH v2 1/7] ACPICA: Add GICv5 MADT structures Lorenzo Pieralisi
2025-12-18 10:14 ` [PATCH v2 2/7] ACPICA: Add Arm IORT IWB node definitions Lorenzo Pieralisi
2025-12-18 10:14 ` [PATCH v2 3/7] irqdomain: Add parent field to struct irqchip_fwid Lorenzo Pieralisi
2026-01-05 12:01 ` Jonathan Cameron
2026-01-07 8:58 ` Lorenzo Pieralisi
2026-01-07 10:04 ` Jonathan Cameron
2026-01-07 17:31 ` Lorenzo Pieralisi
2026-01-13 9:37 ` Thomas Gleixner
2026-01-13 11:04 ` Lorenzo Pieralisi
2025-12-18 10:14 ` [PATCH v2 4/7] PCI/MSI: Make the pci_msi_map_rid_ctlr_node() interface firmware agnostic Lorenzo Pieralisi
2026-01-05 12:21 ` Jonathan Cameron
2026-01-07 9:23 ` Lorenzo Pieralisi
2026-01-05 17:35 ` Bjorn Helgaas
2025-12-18 10:14 ` [PATCH v2 5/7] irqchip/gic-v5: Add ACPI IRS probing Lorenzo Pieralisi
2026-01-05 13:24 ` Jonathan Cameron
2026-01-08 16:22 ` Lorenzo Pieralisi
2025-12-18 10:14 ` [PATCH v2 6/7] irqchip/gic-v5: Add ACPI ITS probing Lorenzo Pieralisi
2026-01-05 13:55 ` Jonathan Cameron [this message]
2026-01-08 16:13 ` Lorenzo Pieralisi
2025-12-18 10:14 ` [PATCH v2 7/7] irqchip/gic-v5: Add ACPI IWB probing Lorenzo Pieralisi
2026-01-05 15:35 ` Jonathan Cameron
2026-01-08 16:12 ` Lorenzo Pieralisi
2026-01-14 15:56 ` [PATCH v2 0/7] irqchip/gic-v5: Code first ACPI boot support Rafael J. Wysocki
2026-01-14 17:03 ` Lorenzo Pieralisi
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