* drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: sparse: cast from restricted __be64
@ 2026-01-13 12:39 kernel test robot
0 siblings, 0 replies; 2+ messages in thread
From: kernel test robot @ 2026-01-13 12:39 UTC (permalink / raw)
To: Aryan Srivastava; +Cc: oe-kbuild-all, linux-kernel, Andi Shyti
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: b71e635feefc852405b14620a7fc58c4c80c0f73
commit: 63ef02da5ddb725555cd41f125ec0bd8e893da3a i2c: octeon: add block-mode i2c operations
date: 8 months ago
config: arm64-randconfig-r121-20260113 (https://download.01.org/0day-ci/archive/20260113/202601132015.AVgB52xg-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 8.5.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260113/202601132015.AVgB52xg-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202601132015.AVgB52xg-lkp@intel.com/
sparse warnings: (new ones prefixed by >>)
drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned long long [usertype] val @@ got restricted __be64 [addressable] [usertype] buf @@
drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: expected unsigned long long [usertype] val
drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: got restricted __be64 [addressable] [usertype] buf
>> drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: sparse: cast from restricted __be64
>> drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: sparse: cast from restricted __be64
>> drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: sparse: cast from restricted __be64
>> drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: sparse: cast from restricted __be64
>> drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: sparse: cast from restricted __be64
>> drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: sparse: cast from restricted __be64
>> drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: sparse: cast from restricted __be64
>> drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: sparse: cast from restricted __be64
drivers/i2c/busses/i2c-octeon-core.c:732:42: sparse: sparse: cast from restricted __be64
vim +731 drivers/i2c/busses/i2c-octeon-core.c
688
689 /**
690 * octeon_i2c_hlc_block_comp_write - high-level-controller composite block write
691 * @i2c: The struct octeon_i2c
692 * @msgs: msg[0] contains address, msg[1] contains data to be written
693 *
694 * i2c core command is constructed and write data is written into the FIFO buffer.
695 * The execution of the command will result in HW write, using the data in FIFO.
696 * Used in the case where the i2c xfer is for greater than 8 bytes of write data.
697 *
698 * Returns: 0 on success, otherwise a negative errno.
699 */
700 static int octeon_i2c_hlc_block_comp_write(struct octeon_i2c *i2c, struct i2c_msg *msgs)
701 {
702 bool set_ext;
703 int ret;
704 u16 len, i;
705 u64 cmd, ext = 0;
706
707 octeon_i2c_hlc_enable(i2c);
708 octeon_i2c_block_enable(i2c);
709
710 /* Write (size - 1) into block control register */
711 len = msgs[1].len - 1;
712 octeon_i2c_writeq_flush((u64)len, i2c->twsi_base + OCTEON_REG_BLOCK_CTL(i2c));
713
714 /* Prepare core command */
715 cmd = SW_TWSI_V | SW_TWSI_SOVR | SW_TWSI_OP_7_IA;
716 cmd |= (u64)(msgs[0].addr & 0x7full) << SW_TWSI_ADDR_SHIFT;
717
718 /* Set parameters for extended message (if required) */
719 set_ext = octeon_i2c_hlc_ext(i2c, msgs[0], &cmd, &ext);
720
721 /* Write msg into FIFO buffer */
722 octeon_i2c_writeq_flush(TWSX_BLOCK_STS_RESET_PTR,
723 i2c->twsi_base + OCTEON_REG_BLOCK_STS(i2c));
724 for (i = 0; i <= len; i += 8) {
725 __be64 buf = 0;
726
727 /* Copy 8 bytes or remaining bytes from message buffer */
728 memcpy(&buf, &msgs[1].buf[i], min(8, msgs[1].len - i));
729
730 /* Byte-swap message data and write into FIFO */
> 731 buf = cpu_to_be64(buf);
732 octeon_i2c_writeq_flush((u64)buf, i2c->twsi_base + OCTEON_REG_BLOCK_FIFO(i2c));
733 }
734 if (set_ext)
735 octeon_i2c_writeq_flush(ext, i2c->twsi_base + OCTEON_REG_SW_TWSI_EXT(i2c));
736
737 /* Send command to core (send data in FIFO) */
738 ret = octeon_i2c_hlc_cmd_send(i2c, cmd);
739 if (ret)
740 goto err;
741
742 cmd = __raw_readq(i2c->twsi_base + OCTEON_REG_SW_TWSI(i2c));
743 if ((cmd & SW_TWSI_R) == 0) {
744 octeon_i2c_block_disable(i2c);
745 return octeon_i2c_check_status(i2c, false);
746 }
747
748 err:
749 octeon_i2c_block_disable(i2c);
750 return ret;
751 }
752
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 2+ messages in thread* drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: sparse: cast from restricted __be64
@ 2025-12-12 17:22 kernel test robot
0 siblings, 0 replies; 2+ messages in thread
From: kernel test robot @ 2025-12-12 17:22 UTC (permalink / raw)
To: Aryan Srivastava; +Cc: oe-kbuild-all, linux-kernel, Andi Shyti
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 187d0801404f415f22c0b31531982c7ea97fa341
commit: 63ef02da5ddb725555cd41f125ec0bd8e893da3a i2c: octeon: add block-mode i2c operations
date: 7 months ago
config: um-randconfig-r134-20251212 (https://download.01.org/0day-ci/archive/20251213/202512130124.KQX07WZx-lkp@intel.com/config)
compiler: clang version 22.0.0git (https://github.com/llvm/llvm-project 1335a05ab8bc8339ce24be3a9da89d8c3f4e0571)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251213/202512130124.KQX07WZx-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202512130124.KQX07WZx-lkp@intel.com/
sparse warnings: (new ones prefixed by >>)
drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned long long [usertype] val @@ got restricted __be64 [addressable] [usertype] buf @@
drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: expected unsigned long long [usertype] val
drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: got restricted __be64 [addressable] [usertype] buf
>> drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: sparse: cast from restricted __be64
>> drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: sparse: cast from restricted __be64
>> drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: sparse: cast from restricted __be64
>> drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: sparse: cast from restricted __be64
>> drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: sparse: cast from restricted __be64
>> drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: sparse: cast from restricted __be64
>> drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: sparse: cast from restricted __be64
>> drivers/i2c/busses/i2c-octeon-core.c:731:23: sparse: sparse: cast from restricted __be64
drivers/i2c/busses/i2c-octeon-core.c:732:42: sparse: sparse: cast from restricted __be64
vim +731 drivers/i2c/busses/i2c-octeon-core.c
688
689 /**
690 * octeon_i2c_hlc_block_comp_write - high-level-controller composite block write
691 * @i2c: The struct octeon_i2c
692 * @msgs: msg[0] contains address, msg[1] contains data to be written
693 *
694 * i2c core command is constructed and write data is written into the FIFO buffer.
695 * The execution of the command will result in HW write, using the data in FIFO.
696 * Used in the case where the i2c xfer is for greater than 8 bytes of write data.
697 *
698 * Returns: 0 on success, otherwise a negative errno.
699 */
700 static int octeon_i2c_hlc_block_comp_write(struct octeon_i2c *i2c, struct i2c_msg *msgs)
701 {
702 bool set_ext;
703 int ret;
704 u16 len, i;
705 u64 cmd, ext = 0;
706
707 octeon_i2c_hlc_enable(i2c);
708 octeon_i2c_block_enable(i2c);
709
710 /* Write (size - 1) into block control register */
711 len = msgs[1].len - 1;
712 octeon_i2c_writeq_flush((u64)len, i2c->twsi_base + OCTEON_REG_BLOCK_CTL(i2c));
713
714 /* Prepare core command */
715 cmd = SW_TWSI_V | SW_TWSI_SOVR | SW_TWSI_OP_7_IA;
716 cmd |= (u64)(msgs[0].addr & 0x7full) << SW_TWSI_ADDR_SHIFT;
717
718 /* Set parameters for extended message (if required) */
719 set_ext = octeon_i2c_hlc_ext(i2c, msgs[0], &cmd, &ext);
720
721 /* Write msg into FIFO buffer */
722 octeon_i2c_writeq_flush(TWSX_BLOCK_STS_RESET_PTR,
723 i2c->twsi_base + OCTEON_REG_BLOCK_STS(i2c));
724 for (i = 0; i <= len; i += 8) {
725 __be64 buf = 0;
726
727 /* Copy 8 bytes or remaining bytes from message buffer */
728 memcpy(&buf, &msgs[1].buf[i], min(8, msgs[1].len - i));
729
730 /* Byte-swap message data and write into FIFO */
> 731 buf = cpu_to_be64(buf);
732 octeon_i2c_writeq_flush((u64)buf, i2c->twsi_base + OCTEON_REG_BLOCK_FIFO(i2c));
733 }
734 if (set_ext)
735 octeon_i2c_writeq_flush(ext, i2c->twsi_base + OCTEON_REG_SW_TWSI_EXT(i2c));
736
737 /* Send command to core (send data in FIFO) */
738 ret = octeon_i2c_hlc_cmd_send(i2c, cmd);
739 if (ret)
740 goto err;
741
742 cmd = __raw_readq(i2c->twsi_base + OCTEON_REG_SW_TWSI(i2c));
743 if ((cmd & SW_TWSI_R) == 0) {
744 octeon_i2c_block_disable(i2c);
745 return octeon_i2c_check_status(i2c, false);
746 }
747
748 err:
749 octeon_i2c_block_disable(i2c);
750 return ret;
751 }
752
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 2+ messages in thread
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