[PATCH v2 1/2] staging: axis-fifo: introduce helper functions for register access

[PATCH v2 1/2] staging: axis-fifo: introduce helper functions for register access

[Minu Jin]

This patch introduces axis_fifo_read_reg(), axis_fifo_write_reg()
to wrap raw ioread32, iowrite32 calls. Using these helper functions
improves code readability and provides a cleaner abstraction for
hardware register access.

All existing single register I/O calls updated to use these
new helpers. This refactoring also ensures a consistent access
pattern and makes future maintenance easier.

Signed-off-by: Minu Jin <s9430939@naver.com>
---
 drivers/staging/axis-fifo/axis-fifo.c | 45 ++++++++++++++++-----------
 1 file changed, 27 insertions(+), 18 deletions(-)

diff --git a/drivers/staging/axis-fifo/axis-fifo.c b/drivers/staging/axis-fifo/axis-fifo.c
index 509d620d6ce7..525156583c4a 100644
--- a/drivers/staging/axis-fifo/axis-fifo.c
+++ b/drivers/staging/axis-fifo/axis-fifo.c
@@ -145,16 +145,26 @@ struct axis_fifo_debug_reg {
  * ----------------------------
  */
 
+static inline u32 axis_fifo_read_reg(struct axis_fifo *fifo, int offset)
+{
+	return ioread32(fifo->base_addr + offset);
+}
+
+static inline void axis_fifo_write_reg(struct axis_fifo *fifo, int offset, u32 val)
+{
+	iowrite32(val, fifo->base_addr + offset);
+}
+
 static void reset_ip_core(struct axis_fifo *fifo)
 {
-	iowrite32(XLLF_SRR_RESET_MASK, fifo->base_addr + XLLF_SRR_OFFSET);
-	iowrite32(XLLF_TDFR_RESET_MASK, fifo->base_addr + XLLF_TDFR_OFFSET);
-	iowrite32(XLLF_RDFR_RESET_MASK, fifo->base_addr + XLLF_RDFR_OFFSET);
-	iowrite32(XLLF_INT_TC_MASK | XLLF_INT_RC_MASK | XLLF_INT_RPURE_MASK |
+	axis_fifo_write_reg(fifo, XLLF_SRR_OFFSET, XLLF_SRR_RESET_MASK);
+	axis_fifo_write_reg(fifo, XLLF_TDFR_OFFSET, XLLF_TDFR_RESET_MASK);
+	axis_fifo_write_reg(fifo, XLLF_RDFR_OFFSET, XLLF_RDFR_RESET_MASK);
+	axis_fifo_write_reg(fifo, XLLF_IER_OFFSET, XLLF_INT_TC_MASK |
+			XLLF_INT_RC_MASK | XLLF_INT_RPURE_MASK |
 		  XLLF_INT_RPORE_MASK | XLLF_INT_RPUE_MASK |
-		  XLLF_INT_TPOE_MASK | XLLF_INT_TSE_MASK,
-		  fifo->base_addr + XLLF_IER_OFFSET);
-	iowrite32(XLLF_INT_CLEAR_ALL, fifo->base_addr + XLLF_ISR_OFFSET);
+		  XLLF_INT_TPOE_MASK | XLLF_INT_TSE_MASK);
+	axis_fifo_write_reg(fifo, XLLF_ISR_OFFSET, XLLF_INT_CLEAR_ALL);
 }
 
 /**
@@ -192,7 +202,7 @@ static ssize_t axis_fifo_read(struct file *f, char __user *buf,
 		if (!mutex_trylock(&fifo->read_lock))
 			return -EAGAIN;
 
-		if (!ioread32(fifo->base_addr + XLLF_RDFO_OFFSET)) {
+		if (!axis_fifo_read_reg(fifo, XLLF_RDFO_OFFSET)) {
 			ret = -EAGAIN;
 			goto end_unlock;
 		}
@@ -203,7 +213,7 @@ static ssize_t axis_fifo_read(struct file *f, char __user *buf,
 		 */
 		mutex_lock(&fifo->read_lock);
 		ret = wait_event_interruptible_timeout(fifo->read_queue,
-						       ioread32(fifo->base_addr + XLLF_RDFO_OFFSET),
+						       axis_fifo_read_reg(fifo, XLLF_RDFO_OFFSET),
 						       read_timeout);
 
 		if (ret <= 0) {
@@ -218,7 +228,7 @@ static ssize_t axis_fifo_read(struct file *f, char __user *buf,
 		}
 	}
 
-	bytes_available = ioread32(fifo->base_addr + XLLF_RLR_OFFSET);
+	bytes_available = axis_fifo_read_reg(fifo, XLLF_RLR_OFFSET);
 	words_available = bytes_available / sizeof(u32);
 	if (!bytes_available) {
 		dev_err(fifo->dt_device, "received a packet of length 0\n");
@@ -334,8 +344,7 @@ static ssize_t axis_fifo_write(struct file *f, const char __user *buf,
 		if (!mutex_trylock(&fifo->write_lock))
 			return -EAGAIN;
 
-		if (words_to_write > ioread32(fifo->base_addr +
-					      XLLF_TDFV_OFFSET)) {
+		if (words_to_write > axis_fifo_read_reg(fifo, XLLF_TDFV_OFFSET)) {
 			ret = -EAGAIN;
 			goto end_unlock;
 		}
@@ -347,7 +356,7 @@ static ssize_t axis_fifo_write(struct file *f, const char __user *buf,
 		 */
 		mutex_lock(&fifo->write_lock);
 		ret = wait_event_interruptible_timeout(fifo->write_queue,
-						       ioread32(fifo->base_addr + XLLF_TDFV_OFFSET)
+						       axis_fifo_read_reg(fifo, XLLF_TDFV_OFFSET)
 								>= words_to_write,
 						       write_timeout);
 
@@ -373,7 +382,7 @@ static ssize_t axis_fifo_write(struct file *f, const char __user *buf,
 		iowrite32(txbuf[i], fifo->base_addr + XLLF_TDFD_OFFSET);
 
 	/* write packet size to fifo */
-	iowrite32(len, fifo->base_addr + XLLF_TLR_OFFSET);
+	axis_fifo_write_reg(fifo, XLLF_TLR_OFFSET, len);
 
 	ret = len;
 	kvfree(txbuf);
@@ -388,8 +397,8 @@ static irqreturn_t axis_fifo_irq(int irq, void *dw)
 	struct axis_fifo *fifo = dw;
 	u32 isr, ier, intr;
 
-	ier = ioread32(fifo->base_addr + XLLF_IER_OFFSET);
-	isr = ioread32(fifo->base_addr + XLLF_ISR_OFFSET);
+	ier = axis_fifo_read_reg(fifo, XLLF_IER_OFFSET);
+	isr = axis_fifo_read_reg(fifo, XLLF_ISR_OFFSET);
 	intr = ier & isr;
 
 	if (intr & XLLF_INT_RC_MASK)
@@ -414,7 +423,7 @@ static irqreturn_t axis_fifo_irq(int irq, void *dw)
 		dev_err(fifo->dt_device,
 			"transmit length mismatch error interrupt\n");
 
-	iowrite32(XLLF_INT_CLEAR_ALL, fifo->base_addr + XLLF_ISR_OFFSET);
+	axis_fifo_write_reg(fifo, XLLF_ISR_OFFSET, XLLF_INT_CLEAR_ALL);
 
 	return IRQ_HANDLED;
 }
@@ -464,7 +473,7 @@ static int axis_fifo_debugfs_regs_show(struct seq_file *m, void *p)
 	struct axis_fifo *fifo = m->private;
 
 	for (reg = regs; reg->name; ++reg) {
-		u32 val = ioread32(fifo->base_addr + reg->offset);
+		u32 val = axis_fifo_read_reg(fifo, reg->offset);
 
 		seq_printf(m, "%*s: 0x%08x\n", AXIS_FIFO_DEBUG_REG_NAME_MAX_LEN,
 			   reg->name, val);
-- 
2.43.0

Re: [PATCH v2 1/2] staging: axis-fifo: introduce helper functions for register access

[Greg KH]

On Wed, Jan 14, 2026 at 10:23:16PM +0900, Minu Jin wrote:
> This patch introduces axis_fifo_read_reg(), axis_fifo_write_reg()
> to wrap raw ioread32, iowrite32 calls. Using these helper functions
> improves code readability and provides a cleaner abstraction for
> hardware register access.
> 
> All existing single register I/O calls updated to use these
> new helpers. This refactoring also ensures a consistent access
> pattern and makes future maintenance easier.
> 
> Signed-off-by: Minu Jin <s9430939@naver.com>
> ---
>  drivers/staging/axis-fifo/axis-fifo.c | 45 ++++++++++++++++-----------
>  1 file changed, 27 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/staging/axis-fifo/axis-fifo.c b/drivers/staging/axis-fifo/axis-fifo.c
> index 509d620d6ce7..525156583c4a 100644
> --- a/drivers/staging/axis-fifo/axis-fifo.c
> +++ b/drivers/staging/axis-fifo/axis-fifo.c
> @@ -145,16 +145,26 @@ struct axis_fifo_debug_reg {
>   * ----------------------------
>   */
>  
> +static inline u32 axis_fifo_read_reg(struct axis_fifo *fifo, int offset)
> +{
> +	return ioread32(fifo->base_addr + offset);
> +}
> +
> +static inline void axis_fifo_write_reg(struct axis_fifo *fifo, int offset, u32 val)
> +{
> +	iowrite32(val, fifo->base_addr + offset);
> +}
> +
>  static void reset_ip_core(struct axis_fifo *fifo)
>  {
> -	iowrite32(XLLF_SRR_RESET_MASK, fifo->base_addr + XLLF_SRR_OFFSET);
> -	iowrite32(XLLF_TDFR_RESET_MASK, fifo->base_addr + XLLF_TDFR_OFFSET);
> -	iowrite32(XLLF_RDFR_RESET_MASK, fifo->base_addr + XLLF_RDFR_OFFSET);
> -	iowrite32(XLLF_INT_TC_MASK | XLLF_INT_RC_MASK | XLLF_INT_RPURE_MASK |
> +	axis_fifo_write_reg(fifo, XLLF_SRR_OFFSET, XLLF_SRR_RESET_MASK);
> +	axis_fifo_write_reg(fifo, XLLF_TDFR_OFFSET, XLLF_TDFR_RESET_MASK);
> +	axis_fifo_write_reg(fifo, XLLF_RDFR_OFFSET, XLLF_RDFR_RESET_MASK);
> +	axis_fifo_write_reg(fifo, XLLF_IER_OFFSET, XLLF_INT_TC_MASK |
> +			XLLF_INT_RC_MASK | XLLF_INT_RPURE_MASK |
>  		  XLLF_INT_RPORE_MASK | XLLF_INT_RPUE_MASK |
> -		  XLLF_INT_TPOE_MASK | XLLF_INT_TSE_MASK,
> -		  fifo->base_addr + XLLF_IER_OFFSET);
> -	iowrite32(XLLF_INT_CLEAR_ALL, fifo->base_addr + XLLF_ISR_OFFSET);
> +		  XLLF_INT_TPOE_MASK | XLLF_INT_TSE_MASK);
> +	axis_fifo_write_reg(fifo, XLLF_ISR_OFFSET, XLLF_INT_CLEAR_ALL);
>  }
>  
>  /**
> @@ -192,7 +202,7 @@ static ssize_t axis_fifo_read(struct file *f, char __user *buf,
>  		if (!mutex_trylock(&fifo->read_lock))
>  			return -EAGAIN;
>  
> -		if (!ioread32(fifo->base_addr + XLLF_RDFO_OFFSET)) {
> +		if (!axis_fifo_read_reg(fifo, XLLF_RDFO_OFFSET)) {
>  			ret = -EAGAIN;
>  			goto end_unlock;
>  		}
> @@ -203,7 +213,7 @@ static ssize_t axis_fifo_read(struct file *f, char __user *buf,
>  		 */
>  		mutex_lock(&fifo->read_lock);
>  		ret = wait_event_interruptible_timeout(fifo->read_queue,
> -						       ioread32(fifo->base_addr + XLLF_RDFO_OFFSET),
> +						       axis_fifo_read_reg(fifo, XLLF_RDFO_OFFSET),
>  						       read_timeout);
>  
>  		if (ret <= 0) {
> @@ -218,7 +228,7 @@ static ssize_t axis_fifo_read(struct file *f, char __user *buf,
>  		}
>  	}
>  
> -	bytes_available = ioread32(fifo->base_addr + XLLF_RLR_OFFSET);
> +	bytes_available = axis_fifo_read_reg(fifo, XLLF_RLR_OFFSET);
>  	words_available = bytes_available / sizeof(u32);
>  	if (!bytes_available) {
>  		dev_err(fifo->dt_device, "received a packet of length 0\n");
> @@ -334,8 +344,7 @@ static ssize_t axis_fifo_write(struct file *f, const char __user *buf,
>  		if (!mutex_trylock(&fifo->write_lock))
>  			return -EAGAIN;
>  
> -		if (words_to_write > ioread32(fifo->base_addr +
> -					      XLLF_TDFV_OFFSET)) {
> +		if (words_to_write > axis_fifo_read_reg(fifo, XLLF_TDFV_OFFSET)) {
>  			ret = -EAGAIN;
>  			goto end_unlock;
>  		}
> @@ -347,7 +356,7 @@ static ssize_t axis_fifo_write(struct file *f, const char __user *buf,
>  		 */
>  		mutex_lock(&fifo->write_lock);
>  		ret = wait_event_interruptible_timeout(fifo->write_queue,
> -						       ioread32(fifo->base_addr + XLLF_TDFV_OFFSET)
> +						       axis_fifo_read_reg(fifo, XLLF_TDFV_OFFSET)
>  								>= words_to_write,
>  						       write_timeout);
>  
> @@ -373,7 +382,7 @@ static ssize_t axis_fifo_write(struct file *f, const char __user *buf,
>  		iowrite32(txbuf[i], fifo->base_addr + XLLF_TDFD_OFFSET);
>  
>  	/* write packet size to fifo */
> -	iowrite32(len, fifo->base_addr + XLLF_TLR_OFFSET);
> +	axis_fifo_write_reg(fifo, XLLF_TLR_OFFSET, len);
>  
>  	ret = len;
>  	kvfree(txbuf);
> @@ -388,8 +397,8 @@ static irqreturn_t axis_fifo_irq(int irq, void *dw)
>  	struct axis_fifo *fifo = dw;
>  	u32 isr, ier, intr;
>  
> -	ier = ioread32(fifo->base_addr + XLLF_IER_OFFSET);
> -	isr = ioread32(fifo->base_addr + XLLF_ISR_OFFSET);
> +	ier = axis_fifo_read_reg(fifo, XLLF_IER_OFFSET);
> +	isr = axis_fifo_read_reg(fifo, XLLF_ISR_OFFSET);
>  	intr = ier & isr;
>  
>  	if (intr & XLLF_INT_RC_MASK)
> @@ -414,7 +423,7 @@ static irqreturn_t axis_fifo_irq(int irq, void *dw)
>  		dev_err(fifo->dt_device,
>  			"transmit length mismatch error interrupt\n");
>  
> -	iowrite32(XLLF_INT_CLEAR_ALL, fifo->base_addr + XLLF_ISR_OFFSET);
> +	axis_fifo_write_reg(fifo, XLLF_ISR_OFFSET, XLLF_INT_CLEAR_ALL);
>  
>  	return IRQ_HANDLED;
>  }
> @@ -464,7 +473,7 @@ static int axis_fifo_debugfs_regs_show(struct seq_file *m, void *p)
>  	struct axis_fifo *fifo = m->private;
>  
>  	for (reg = regs; reg->name; ++reg) {
> -		u32 val = ioread32(fifo->base_addr + reg->offset);
> +		u32 val = axis_fifo_read_reg(fifo, reg->offset);
>  
>  		seq_printf(m, "%*s: 0x%08x\n", AXIS_FIFO_DEBUG_REG_NAME_MAX_LEN,
>  			   reg->name, val);
> -- 
> 2.43.0
> 

Hi,

This is the friendly patch-bot of Greg Kroah-Hartman.  You have sent him
a patch that has triggered this response.  He used to manually respond
to these common problems, but in order to save his sanity (he kept
writing the same thing over and over, yet to different people), I was
created.  Hopefully you will not take offence and will fix the problem
in your patch and resubmit it so that it can be accepted into the Linux
kernel tree.

You are receiving this message because of the following common error(s)
as indicated below:

- This looks like a new version of a previously submitted patch, but you
  did not list below the --- line any changes from the previous version.
  Please read the section entitled "The canonical patch format" in the
  kernel file, Documentation/process/submitting-patches.rst for what
  needs to be done here to properly describe this.

If you wish to discuss this problem further, or you have questions about
how to resolve this issue, please feel free to respond to this email and
Greg will reply once he has dug out from the pending patches received
from other developers.

thanks,

greg k-h's patch email bot

[PATCH v2 1/2] staging: axis-fifo: introduce helper functions for register access

[Minu Jin]

This patch introduces axis_fifo_read_reg(), axis_fifo_write_reg()
to wrap raw ioread32, iowrite32 calls. Using these helper functions
improves code readability and provides a cleaner abstraction for
hardware register access.

All existing single register I/O calls updated to use these
new helpers. This refactoring also ensures a consistent access
pattern and makes future maintenance easier.

Signed-off-by: Minu Jin <s9430939@naver.com>
---
v2: No changes.

 drivers/staging/axis-fifo/axis-fifo.c | 45 ++++++++++++++++-----------
 1 file changed, 27 insertions(+), 18 deletions(-)

diff --git a/drivers/staging/axis-fifo/axis-fifo.c b/drivers/staging/axis-fifo/axis-fifo.c
index 509d620d6ce7..525156583c4a 100644
--- a/drivers/staging/axis-fifo/axis-fifo.c
+++ b/drivers/staging/axis-fifo/axis-fifo.c
@@ -145,16 +145,26 @@ struct axis_fifo_debug_reg {
  * ----------------------------
  */
 
+static inline u32 axis_fifo_read_reg(struct axis_fifo *fifo, int offset)
+{
+	return ioread32(fifo->base_addr + offset);
+}
+
+static inline void axis_fifo_write_reg(struct axis_fifo *fifo, int offset, u32 val)
+{
+	iowrite32(val, fifo->base_addr + offset);
+}
+
 static void reset_ip_core(struct axis_fifo *fifo)
 {
-	iowrite32(XLLF_SRR_RESET_MASK, fifo->base_addr + XLLF_SRR_OFFSET);
-	iowrite32(XLLF_TDFR_RESET_MASK, fifo->base_addr + XLLF_TDFR_OFFSET);
-	iowrite32(XLLF_RDFR_RESET_MASK, fifo->base_addr + XLLF_RDFR_OFFSET);
-	iowrite32(XLLF_INT_TC_MASK | XLLF_INT_RC_MASK | XLLF_INT_RPURE_MASK |
+	axis_fifo_write_reg(fifo, XLLF_SRR_OFFSET, XLLF_SRR_RESET_MASK);
+	axis_fifo_write_reg(fifo, XLLF_TDFR_OFFSET, XLLF_TDFR_RESET_MASK);
+	axis_fifo_write_reg(fifo, XLLF_RDFR_OFFSET, XLLF_RDFR_RESET_MASK);
+	axis_fifo_write_reg(fifo, XLLF_IER_OFFSET, XLLF_INT_TC_MASK |
+			XLLF_INT_RC_MASK | XLLF_INT_RPURE_MASK |
 		  XLLF_INT_RPORE_MASK | XLLF_INT_RPUE_MASK |
-		  XLLF_INT_TPOE_MASK | XLLF_INT_TSE_MASK,
-		  fifo->base_addr + XLLF_IER_OFFSET);
-	iowrite32(XLLF_INT_CLEAR_ALL, fifo->base_addr + XLLF_ISR_OFFSET);
+		  XLLF_INT_TPOE_MASK | XLLF_INT_TSE_MASK);
+	axis_fifo_write_reg(fifo, XLLF_ISR_OFFSET, XLLF_INT_CLEAR_ALL);
 }
 
 /**
@@ -192,7 +202,7 @@ static ssize_t axis_fifo_read(struct file *f, char __user *buf,
 		if (!mutex_trylock(&fifo->read_lock))
 			return -EAGAIN;
 
-		if (!ioread32(fifo->base_addr + XLLF_RDFO_OFFSET)) {
+		if (!axis_fifo_read_reg(fifo, XLLF_RDFO_OFFSET)) {
 			ret = -EAGAIN;
 			goto end_unlock;
 		}
@@ -203,7 +213,7 @@ static ssize_t axis_fifo_read(struct file *f, char __user *buf,
 		 */
 		mutex_lock(&fifo->read_lock);
 		ret = wait_event_interruptible_timeout(fifo->read_queue,
-						       ioread32(fifo->base_addr + XLLF_RDFO_OFFSET),
+						       axis_fifo_read_reg(fifo, XLLF_RDFO_OFFSET),
 						       read_timeout);
 
 		if (ret <= 0) {
@@ -218,7 +228,7 @@ static ssize_t axis_fifo_read(struct file *f, char __user *buf,
 		}
 	}
 
-	bytes_available = ioread32(fifo->base_addr + XLLF_RLR_OFFSET);
+	bytes_available = axis_fifo_read_reg(fifo, XLLF_RLR_OFFSET);
 	words_available = bytes_available / sizeof(u32);
 	if (!bytes_available) {
 		dev_err(fifo->dt_device, "received a packet of length 0\n");
@@ -334,8 +344,7 @@ static ssize_t axis_fifo_write(struct file *f, const char __user *buf,
 		if (!mutex_trylock(&fifo->write_lock))
 			return -EAGAIN;
 
-		if (words_to_write > ioread32(fifo->base_addr +
-					      XLLF_TDFV_OFFSET)) {
+		if (words_to_write > axis_fifo_read_reg(fifo, XLLF_TDFV_OFFSET)) {
 			ret = -EAGAIN;
 			goto end_unlock;
 		}
@@ -347,7 +356,7 @@ static ssize_t axis_fifo_write(struct file *f, const char __user *buf,
 		 */
 		mutex_lock(&fifo->write_lock);
 		ret = wait_event_interruptible_timeout(fifo->write_queue,
-						       ioread32(fifo->base_addr + XLLF_TDFV_OFFSET)
+						       axis_fifo_read_reg(fifo, XLLF_TDFV_OFFSET)
 								>= words_to_write,
 						       write_timeout);
 
@@ -373,7 +382,7 @@ static ssize_t axis_fifo_write(struct file *f, const char __user *buf,
 		iowrite32(txbuf[i], fifo->base_addr + XLLF_TDFD_OFFSET);
 
 	/* write packet size to fifo */
-	iowrite32(len, fifo->base_addr + XLLF_TLR_OFFSET);
+	axis_fifo_write_reg(fifo, XLLF_TLR_OFFSET, len);
 
 	ret = len;
 	kvfree(txbuf);
@@ -388,8 +397,8 @@ static irqreturn_t axis_fifo_irq(int irq, void *dw)
 	struct axis_fifo *fifo = dw;
 	u32 isr, ier, intr;
 
-	ier = ioread32(fifo->base_addr + XLLF_IER_OFFSET);
-	isr = ioread32(fifo->base_addr + XLLF_ISR_OFFSET);
+	ier = axis_fifo_read_reg(fifo, XLLF_IER_OFFSET);
+	isr = axis_fifo_read_reg(fifo, XLLF_ISR_OFFSET);
 	intr = ier & isr;
 
 	if (intr & XLLF_INT_RC_MASK)
@@ -414,7 +423,7 @@ static irqreturn_t axis_fifo_irq(int irq, void *dw)
 		dev_err(fifo->dt_device,
 			"transmit length mismatch error interrupt\n");
 
-	iowrite32(XLLF_INT_CLEAR_ALL, fifo->base_addr + XLLF_ISR_OFFSET);
+	axis_fifo_write_reg(fifo, XLLF_ISR_OFFSET, XLLF_INT_CLEAR_ALL);
 
 	return IRQ_HANDLED;
 }
@@ -464,7 +473,7 @@ static int axis_fifo_debugfs_regs_show(struct seq_file *m, void *p)
 	struct axis_fifo *fifo = m->private;
 
 	for (reg = regs; reg->name; ++reg) {
-		u32 val = ioread32(fifo->base_addr + reg->offset);
+		u32 val = axis_fifo_read_reg(fifo, reg->offset);
 
 		seq_printf(m, "%*s: 0x%08x\n", AXIS_FIFO_DEBUG_REG_NAME_MAX_LEN,
 			   reg->name, val);
-- 
2.43.0

[PATCH v2 2/2] staging: axis-fifo: Use bulk I/O accessors for data transfers

[Minu Jin]

Replace manual for loops with ioread32_rep/iowrite32_rep.
Add axis_fifo_read_data() and axis_fifo_write_data() wrappers to
encapsulate these block-transfer operations.

No functional changes intended

Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202601141928.CyFxDTEk-lkp@intel.com/
Signed-off-by: Minu Jin <s9430939@naver.com>
---
v2:
 - Remove unused variable 'i' in axis_fifo_read() to fix build warning
   reported by kernel test robot
 - Add Reported-by and Closes tags

 drivers/staging/axis-fifo/axis-fifo.c | 20 +++++++++++++-------
 1 file changed, 13 insertions(+), 7 deletions(-)

diff --git a/drivers/staging/axis-fifo/axis-fifo.c b/drivers/staging/axis-fifo/axis-fifo.c
index 525156583c4a..009333cc398b 100644
--- a/drivers/staging/axis-fifo/axis-fifo.c
+++ b/drivers/staging/axis-fifo/axis-fifo.c
@@ -150,11 +150,21 @@ static inline u32 axis_fifo_read_reg(struct axis_fifo *fifo, int offset)
 	return ioread32(fifo->base_addr + offset);
 }
 
+static inline void axis_fifo_read_data(struct axis_fifo *fifo, void *buf, int count)
+{
+	ioread32_rep(fifo->base_addr + XLLF_RDFD_OFFSET, buf, count);
+}
+
 static inline void axis_fifo_write_reg(struct axis_fifo *fifo, int offset, u32 val)
 {
 	iowrite32(val, fifo->base_addr + offset);
 }
 
+static inline void axis_fifo_write_data(struct axis_fifo *fifo, const void *buf, int count)
+{
+	iowrite32_rep(fifo->base_addr + XLLF_TDFD_OFFSET, buf, count);
+}
+
 static void reset_ip_core(struct axis_fifo *fifo)
 {
 	axis_fifo_write_reg(fifo, XLLF_SRR_OFFSET, XLLF_SRR_RESET_MASK);
@@ -190,7 +200,6 @@ static ssize_t axis_fifo_read(struct file *f, char __user *buf,
 	unsigned int words_available;
 	unsigned int copied;
 	unsigned int copy;
-	unsigned int i;
 	int ret;
 	u32 tmp_buf[READ_BUF_SIZE];
 
@@ -259,10 +268,8 @@ static ssize_t axis_fifo_read(struct file *f, char __user *buf,
 	while (words_available > 0) {
 		copy = min(words_available, READ_BUF_SIZE);
 
-		for (i = 0; i < copy; i++) {
-			tmp_buf[i] = ioread32(fifo->base_addr +
-					      XLLF_RDFD_OFFSET);
-		}
+		axis_fifo_read_data(fifo, tmp_buf, copy);
+
 		words_available -= copy;
 
 		if (copy_to_user(buf + copied * sizeof(u32), tmp_buf,
@@ -378,8 +385,7 @@ static ssize_t axis_fifo_write(struct file *f, const char __user *buf,
 		goto end_unlock;
 	}
 
-	for (int i = 0; i < words_to_write; ++i)
-		iowrite32(txbuf[i], fifo->base_addr + XLLF_TDFD_OFFSET);
+	axis_fifo_write_data(fifo, txbuf, words_to_write);
 
 	/* write packet size to fifo */
 	axis_fifo_write_reg(fifo, XLLF_TLR_OFFSET, len);
-- 
2.43.0

Re: [PATCH v2 1/2] staging: axis-fifo: introduce helper functions for register access

[Greg KH]

On Thu, Jan 15, 2026 at 11:25:08AM +0900, Minu Jin wrote:
> This patch introduces axis_fifo_read_reg(), axis_fifo_write_reg()
> to wrap raw ioread32, iowrite32 calls. Using these helper functions
> improves code readability and provides a cleaner abstraction for
> hardware register access.

Not really.  Normally wrapper functions are not a good idea, why are
they needed here?  What is asking for this change?

> All existing single register I/O calls updated to use these
> new helpers. This refactoring also ensures a consistent access
> pattern and makes future maintenance easier.
> 
> Signed-off-by: Minu Jin <s9430939@naver.com>
> ---
> v2: No changes.
> 
>  drivers/staging/axis-fifo/axis-fifo.c | 45 ++++++++++++++++-----------
>  1 file changed, 27 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/staging/axis-fifo/axis-fifo.c b/drivers/staging/axis-fifo/axis-fifo.c
> index 509d620d6ce7..525156583c4a 100644
> --- a/drivers/staging/axis-fifo/axis-fifo.c
> +++ b/drivers/staging/axis-fifo/axis-fifo.c
> @@ -145,16 +145,26 @@ struct axis_fifo_debug_reg {
>   * ----------------------------
>   */
>  
> +static inline u32 axis_fifo_read_reg(struct axis_fifo *fifo, int offset)
> +{
> +	return ioread32(fifo->base_addr + offset);
> +}
> +
> +static inline void axis_fifo_write_reg(struct axis_fifo *fifo, int offset, u32 val)
> +{
> +	iowrite32(val, fifo->base_addr + offset);
> +}
> +
>  static void reset_ip_core(struct axis_fifo *fifo)
>  {
> -	iowrite32(XLLF_SRR_RESET_MASK, fifo->base_addr + XLLF_SRR_OFFSET);
> -	iowrite32(XLLF_TDFR_RESET_MASK, fifo->base_addr + XLLF_TDFR_OFFSET);
> -	iowrite32(XLLF_RDFR_RESET_MASK, fifo->base_addr + XLLF_RDFR_OFFSET);
> -	iowrite32(XLLF_INT_TC_MASK | XLLF_INT_RC_MASK | XLLF_INT_RPURE_MASK |
> +	axis_fifo_write_reg(fifo, XLLF_SRR_OFFSET, XLLF_SRR_RESET_MASK);
> +	axis_fifo_write_reg(fifo, XLLF_TDFR_OFFSET, XLLF_TDFR_RESET_MASK);
> +	axis_fifo_write_reg(fifo, XLLF_RDFR_OFFSET, XLLF_RDFR_RESET_MASK);
> +	axis_fifo_write_reg(fifo, XLLF_IER_OFFSET, XLLF_INT_TC_MASK |
> +			XLLF_INT_RC_MASK | XLLF_INT_RPURE_MASK |
>  		  XLLF_INT_RPORE_MASK | XLLF_INT_RPUE_MASK |

Odd indentation :(

I don't really see the need for this change, sorry.  When reading code,
it's much simpler to see iowrite32() and know what is happening instead
of having to go look up axis_fifo_write_reg() and determine that "hey,
that's just a wrapper for iowrite32()".

thanks,

greg k-h

Re: [PATCH v2 2/2] staging: axis-fifo: Use bulk I/O accessors for data transfers

[Greg KH]

On Thu, Jan 15, 2026 at 11:25:09AM +0900, Minu Jin wrote:
> Replace manual for loops with ioread32_rep/iowrite32_rep.
> Add axis_fifo_read_data() and axis_fifo_write_data() wrappers to
> encapsulate these block-transfer operations.
> 
> No functional changes intended
> 
> Reported-by: kernel test robot <lkp@intel.com>
> Closes: https://lore.kernel.org/oe-kbuild-all/202601141928.CyFxDTEk-lkp@intel.com/
> Signed-off-by: Minu Jin <s9430939@naver.com>
> ---
> v2:
>  - Remove unused variable 'i' in axis_fifo_read() to fix build warning
>    reported by kernel test robot
>  - Add Reported-by and Closes tags
> 
>  drivers/staging/axis-fifo/axis-fifo.c | 20 +++++++++++++-------
>  1 file changed, 13 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/staging/axis-fifo/axis-fifo.c b/drivers/staging/axis-fifo/axis-fifo.c
> index 525156583c4a..009333cc398b 100644
> --- a/drivers/staging/axis-fifo/axis-fifo.c
> +++ b/drivers/staging/axis-fifo/axis-fifo.c
> @@ -150,11 +150,21 @@ static inline u32 axis_fifo_read_reg(struct axis_fifo *fifo, int offset)
>  	return ioread32(fifo->base_addr + offset);
>  }
>  
> +static inline void axis_fifo_read_data(struct axis_fifo *fifo, void *buf, int count)
> +{
> +	ioread32_rep(fifo->base_addr + XLLF_RDFD_OFFSET, buf, count);
> +}

Are you _sure_ this is the same thing as:

> -		for (i = 0; i < copy; i++) {
> -			tmp_buf[i] = ioread32(fifo->base_addr +
> -					      XLLF_RDFD_OFFSET);
> -		}
> +		axis_fifo_read_data(fifo, tmp_buf, copy);

While it might look the same, can the hardware handle reading chunks of
memory like that all at once instead of in a loop like the driver is
doing?  If so great, but this needs to be tested on the hardware please.

And again, you are creating wrapper functions that are not needed, if
this really can be a replacement, just call ioread32_rep() directly.

thanks,

greg k-h

Re: [PATCH v2 2/2] staging: axis-fifo: Use bulk I/O accessors for data transfers

[Greg KH]

On Thu, Jan 15, 2026 at 11:25:09AM +0900, Minu Jin wrote:
> Replace manual for loops with ioread32_rep/iowrite32_rep.
> Add axis_fifo_read_data() and axis_fifo_write_data() wrappers to
> encapsulate these block-transfer operations.
> 
> No functional changes intended
> 
> Reported-by: kernel test robot <lkp@intel.com>

The test robot reported that this needs to be replaced?  Or did it just
report a problem in your previous submission?  If the latter, then
there's no need to add that here as that really doesn't make sense.

thanks,

greg k-h

Re: [PATCH v2 1/2] staging: axis-fifo: introduce helper functions for register access

[Greg KH]

On Thu, Jan 15, 2026 at 11:25:08AM +0900, Minu Jin wrote:
> This patch introduces axis_fifo_read_reg(), axis_fifo_write_reg()
> to wrap raw ioread32, iowrite32 calls. Using these helper functions
> improves code readability and provides a cleaner abstraction for
> hardware register access.
> 
> All existing single register I/O calls updated to use these
> new helpers. This refactoring also ensures a consistent access
> pattern and makes future maintenance easier.
> 
> Signed-off-by: Minu Jin <s9430939@naver.com>
> ---
> v2: No changes.

This should have been v3, right?

So next one is v4?

thanks,

greg k-h

Re: [PATCH v2 1/2] staging: axis-fifo: introduce helper functions for register access

[Minu Jin]

Right, this should have been v3. My mistake.
I'm withdrawing this series - I don't have hardware to test ioread32_rep.
Thanks

Minu Jin