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From: Jonathan Cameron <jonathan.cameron@huawei.com>
To: <dan.j.williams@intel.com>
Cc: Terry Bowman <terry.bowman@amd.com>, <dave@stgolabs.net>,
	<dave.jiang@intel.com>, <alison.schofield@intel.com>,
	<bhelgaas@google.com>, <shiju.jose@huawei.com>,
	<ming.li@zohomail.com>, <Smita.KoralahalliChannabasappa@amd.com>,
	<rrichter@amd.com>, <dan.carpenter@linaro.org>,
	<PradeepVineshReddy.Kodamati@amd.com>, <lukas@wunner.de>,
	<Benjamin.Cheatham@amd.com>,
	<sathyanarayanan.kuppuswamy@linux.intel.com>,
	<linux-cxl@vger.kernel.org>, <vishal.l.verma@intel.com>,
	<alucerop@amd.com>, <ira.weiny@intel.com>,
	<linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>
Subject: Re: [PATCH v14 19/34] cxl/port: Fix devm resource leaks around with dport management
Date: Fri, 16 Jan 2026 16:16:07 +0000	[thread overview]
Message-ID: <20260116161607.00005588@huawei.com> (raw)
In-Reply-To: <20260116150119.00003bbd@huawei.com>


> 	rc = check_no_existing_dport(port, dport_dev);
> 	if (rc)
> 		return ERR_PTR(rc);
> 
> then can rename new_dport to dport for this patch.
> Or don't bother hiding it and just use dport variable for both. 
> 
> 
> >  	int rc;
> >  
> > @@ -1615,29 +1649,47 @@ static struct cxl_dport *cxl_port_add_dport(struct cxl_port *port,
> >  		return ERR_PTR(-EBUSY);
> >  	}
> >  
> > -	struct cxl_dport *new_dport __free(del_cxl_dport) =
> > -		devm_cxl_add_dport_by_dev(port, dport_dev);
> > -	if (IS_ERR(new_dport))
> > -		return new_dport;
> > -
> > -	cxl_switch_parse_cdat(new_dport);
> > +	/*
> > +	 * With the first dport arrival it is now safe to start looking at
> > +	 * component registers. Be careful to not strand resources if dport
> > +	 * creation ultimately fails.
> > +	 */
> > +	struct cxl_port *port_group __free(cxl_port_release_group) =
> > +		cxl_port_open_group(port);  
> 
> So this is relies on everything being registered against port->dev, whereas
> for root ports this then gets handed off to port->uport_dev.
> That's a bit obscure - hence request for some patch description text
> on who owns what resources + when.
> 
> > +	if (IS_ERR(port_group))
> > +		return ERR_CAST(port_group);
> >  
> > -	if (ida_is_empty(&port->decoder_ida)) {
> > +	if (port->nr_dports == 0) {
> >  		rc = devm_cxl_switch_port_decoders_setup(port);
> >  		if (rc)
> >  			return ERR_PTR(rc);
I'm not totally sure I have an appropriate base for messing with this but
with just this patch on top of cxl/for-7.0/cxl-init I'm getting problems
with the reorder here as the devm_cxl_switch_port fails to map HDM decoders.
On a simple single switch couple of devices test.

I'm probably suffering Friday afternoon syndrome (and naughty testing just
a middle patch in a series)

My 'guess' is that it's because we no longer add the port first.
I couldn't spot any other patch messing with related logic earlier in Terry's series
(and wanted to keep what I was messing with for trying alternative fixes to a minimum)

Any thoughts on what I'm missing?

Jonathan


> > -		dev_dbg(&port->dev, "first dport%d:%s added with decoders\n",
> > -			new_dport->port_id, dev_name(dport_dev));
> > -		return no_free_ptr(new_dport);
> > +		/*
> > +		 * Note, when nr_dports returns to zero the port is unregistered
> > +		 * and triggers cleanup. I.e. no need for open-coded release
> > +		 * action on dport removal. See cxl_detach_ep() for that logic.
> > +		 */
> >  	}
> >  
> > +	new_dport = cxl_add_dport_by_dev(port, dport_dev);
> > +	if (IS_ERR(new_dport))
> > +		return new_dport;
> > +
> > +	rc = cxl_dport_autoremove(new_dport);
> > +	if (rc)
> > +		return ERR_PTR(rc);
> > +
> > +	cxl_switch_parse_cdat(new_dport);
> > +
> > +	/* group tracking no longer needed, dport successfully added */
> > +	cxl_port_remove_group(no_free_ptr(port_group));  


  reply	other threads:[~2026-01-16 16:16 UTC|newest]

Thread overview: 129+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-14 18:20 [PATCH v14 00/34] Enable CXL PCIe Port Protocol Error handling and logging Terry Bowman
2026-01-14 18:20 ` [PATCH v14 01/34] PCI: Move CXL DVSEC definitions into uapi/linux/pci_regs.h Terry Bowman
2026-01-22 18:58   ` Bjorn Helgaas
2026-01-22 19:43     ` Bowman, Terry
2026-01-14 18:20 ` [PATCH v14 02/34] PCI: Update CXL DVSEC definitions Terry Bowman
2026-01-14 18:53   ` Jonathan Cameron
2026-01-19 23:44     ` dan.j.williams
2026-01-22 18:37   ` Bjorn Helgaas
2026-01-14 18:20 ` [PATCH v14 03/34] PCI: Introduce pcie_is_cxl() Terry Bowman
2026-01-21  1:19   ` dan.j.williams
2026-01-22 18:39   ` Bjorn Helgaas
2026-01-14 18:20 ` [PATCH v14 04/34] cxl/pci: Remove unnecessary CXL Endpoint handling helper functions Terry Bowman
2026-01-14 18:20 ` [PATCH v14 05/34] cxl/pci: Remove unnecessary CXL RCH " Terry Bowman
2026-01-14 18:20 ` [PATCH v14 06/34] PCI: Replace cxl_error_is_native() with pcie_aer_is_native() Terry Bowman
2026-01-14 18:55   ` Jonathan Cameron
2026-01-14 20:16     ` Dave Jiang
2026-01-14 20:15   ` Dave Jiang
2026-01-22 18:23   ` Bjorn Helgaas
2026-01-14 18:20 ` [PATCH v14 07/34] cxl/pci: Remove CXL VH handling in CONFIG_PCIEAER_CXL conditional blocks from core/pci.c Terry Bowman
2026-01-14 20:51   ` Dave Jiang
2026-01-14 18:20 ` [PATCH v14 08/34] cxl/pci: Move CXL driver's RCH error handling into core/ras_rch.c Terry Bowman
2026-01-14 20:35   ` Dave Jiang
2026-01-14 18:20 ` [PATCH v14 09/34] PCI/AER: Export pci_aer_unmask_internal_errors() Terry Bowman
2026-01-14 19:01   ` Jonathan Cameron
2026-01-14 19:09   ` Kuppuswamy Sathyanarayanan
2026-01-14 20:40   ` Dave Jiang
2026-01-20  2:09   ` dan.j.williams
2026-01-22 10:31     ` Lukas Wunner
2026-01-22 16:48       ` dan.j.williams
2026-01-22 18:51         ` Lukas Wunner
2026-01-22 18:49   ` Bjorn Helgaas
2026-01-14 18:20 ` [PATCH v14 10/34] PCI/AER: Update is_internal_error() to be non-static is_aer_internal_error() Terry Bowman
2026-01-14 19:08   ` Jonathan Cameron
2026-01-15 20:42     ` dan.j.williams
2026-01-22 13:34       ` Lukas Wunner
2026-01-22 19:09         ` dan.j.williams
2026-01-22 19:32           ` Lukas Wunner
2026-01-22 21:32             ` dan.j.williams
2026-01-23 12:22               ` Jonathan Cameron
2026-01-20  2:20   ` dan.j.williams
2026-01-20 15:15     ` Bowman, Terry
2026-01-20 16:53       ` dan.j.williams
2026-01-22 18:48   ` Bjorn Helgaas
2026-01-14 18:20 ` [PATCH v14 11/34] PCI/AER: Move CXL RCH error handling to aer_cxl_rch.c Terry Bowman
2026-01-22 17:23   ` Markus Elfring
2026-01-22 20:05     ` Bowman, Terry
2026-01-22 18:53   ` Bjorn Helgaas
2026-01-14 18:20 ` [PATCH v14 12/34] PCI/AER: Use guard() in cxl_rch_handle_error_iter() Terry Bowman
2026-01-14 19:11   ` Jonathan Cameron
2026-01-14 18:20 ` [PATCH v14 13/34] PCI/AER: Replace PCIEAER_CXL symbol with CXL_RAS Terry Bowman
2026-01-14 19:12   ` Jonathan Cameron
2026-01-14 20:49   ` Dave Jiang
2026-01-14 20:50   ` Dave Jiang
2026-01-22 18:24   ` Bjorn Helgaas
2026-01-14 18:20 ` [PATCH v14 14/34] PCI/AER: Report CXL or PCIe bus type in AER trace logging Terry Bowman
2026-01-14 19:45   ` Jonathan Cameron
2026-01-15 15:55     ` Mauro Carvalho Chehab
2026-01-14 20:56   ` Dave Jiang
2026-01-14 18:20 ` [PATCH v14 15/34] PCI/AER: Update struct aer_err_info with kernel-doc formatting Terry Bowman
2026-01-14 19:48   ` Jonathan Cameron
2026-01-15 20:56     ` dan.j.williams
2026-01-14 21:06   ` Dave Jiang
2026-01-22 18:29   ` Bjorn Helgaas
2026-01-14 18:20 ` [PATCH v14 16/34] cxl/mem: Clarify @host for devm_cxl_add_nvdimm() Terry Bowman
2026-01-14 19:49   ` Jonathan Cameron
2026-01-14 21:08   ` Dave Jiang
2026-01-16  3:07     ` dan.j.williams
2026-01-16 16:22       ` Dave Jiang
2026-01-14 18:20 ` [PATCH v14 17/34] cxl: Update RAS handler interfaces to also support CXL Ports Terry Bowman
2026-01-14 18:20 ` [PATCH v14 18/34] cxl/port: Remove "enumerate dports" helpers Terry Bowman
2026-01-14 19:50   ` Jonathan Cameron
2026-01-14 21:23     ` Dave Jiang
2026-01-16  3:15     ` dan.j.williams
2026-01-14 21:24   ` Dave Jiang
2026-01-16  3:21   ` dan.j.williams
2026-01-14 18:20 ` [PATCH v14 19/34] cxl/port: Fix devm resource leaks around with dport management Terry Bowman
2026-01-14 21:26   ` Dave Jiang
2026-01-15 14:46   ` Jonathan Cameron
2026-01-16  4:45     ` dan.j.williams
2026-01-16 15:01       ` Jonathan Cameron
2026-01-16 16:16         ` Jonathan Cameron [this message]
2026-01-19 23:02           ` dan.j.williams
2026-01-20 12:25             ` Jonathan Cameron
2026-01-19  2:48         ` dan.j.williams
2026-01-14 18:20 ` [PATCH v14 20/34] cxl/port: Move dport operations to a driver event Terry Bowman
2026-01-14 21:45   ` Dave Jiang
2026-01-15 14:56   ` Jonathan Cameron
2026-01-14 18:20 ` [PATCH v14 21/34] cxl/port: Move dport RAS reporting to a port resource Terry Bowman
2026-01-14 21:47   ` Dave Jiang
2026-01-15 15:02   ` Jonathan Cameron
2026-01-14 18:20 ` [PATCH v14 22/34] cxl: Update CXL Endpoint tracing Terry Bowman
2026-01-14 18:20 ` [PATCH v14 23/34] cxl: Map CXL Endpoint Port and CXL Switch Port RAS registers Terry Bowman
2026-01-14 21:53   ` Dave Jiang
2026-01-15 15:17   ` Jonathan Cameron
2026-01-14 18:20 ` [PATCH v14 24/34] cxl/port: Move endpoint component register management to cxl_port Terry Bowman
2026-01-14 21:55   ` Dave Jiang
2026-01-15 15:28   ` Jonathan Cameron
2026-01-14 18:20 ` [PATCH v14 25/34] cxl/port: Map Port component registers before switchport init Terry Bowman
2026-01-14 21:59   ` Dave Jiang
2026-01-15 15:30   ` Jonathan Cameron
2026-01-14 18:20 ` [PATCH v14 26/34] cxl: Change CXL handlers to use guard() instead of scoped_guard() Terry Bowman
2026-01-23 10:05   ` Markus Elfring
2026-01-14 18:20 ` [PATCH v14 27/34] PCI/ERR: Introduce PCI_ERS_RESULT_PANIC Terry Bowman
2026-01-14 18:58   ` Kuppuswamy Sathyanarayanan
2026-01-14 19:20     ` Bowman, Terry
2026-01-14 19:45       ` Kuppuswamy Sathyanarayanan
2026-01-14 18:20 ` [PATCH v14 28/34] PCI/AER: Move AER driver's CXL VH handling to pcie/aer_cxl_vh.c Terry Bowman
2026-01-15 15:40   ` Jonathan Cameron
2026-01-14 18:20 ` [PATCH v14 29/34] cxl/port: Unify endpoint and switch port lookup Terry Bowman
2026-01-14 23:04   ` Dave Jiang
2026-01-15 15:44   ` Jonathan Cameron
2026-01-14 18:20 ` [PATCH v14 30/34] PCI/AER: Dequeue forwarded CXL error Terry Bowman
2026-01-14 23:18   ` Dave Jiang
2026-01-16 14:42     ` Bowman, Terry
2026-01-15 16:01   ` Jonathan Cameron
2026-01-15 17:29     ` Bowman, Terry
2026-01-22 18:32   ` Bjorn Helgaas
2026-01-14 18:20 ` [PATCH v14 31/34] PCI: Introduce CXL Port protocol error handlers Terry Bowman
2026-01-14 23:37   ` Dave Jiang
2026-01-15 16:12     ` Jonathan Cameron
2026-01-22 18:27   ` Bjorn Helgaas
2026-01-14 18:20 ` [PATCH v14 32/34] cxl: Update Endpoint uncorrectable protocol error handling Terry Bowman
2026-01-14 22:07   ` dan.j.williams
2026-01-15 15:26     ` Bowman, Terry
2026-01-15 15:27     ` Bowman, Terry
2026-01-14 18:20 ` [PATCH v14 33/34] cxl: Update Endpoint correctable " Terry Bowman
2026-01-14 18:20 ` [PATCH v14 34/34] cxl: Enable CXL protocol errors during CXL Port probe Terry Bowman
2026-01-15 16:18   ` Jonathan Cameron
2026-01-15 19:41     ` Bowman, Terry

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