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Wed, 21 Jan 2026 09:56:18 -0800 Received: from build-va-bionic-20251122.nvidia.com (10.127.8.14) by mail.nvidia.com (10.126.190.181) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Wed, 21 Jan 2026 09:56:17 -0800 From: Vishwaroop A To: CC: , , , , , , , , , , , , Vishwaroop A Subject: Re: [PATCH 0/6] spi: tegra-qspi: Fix race condition causing NULL pointer dereference and spurious IRQ Date: Wed, 21 Jan 2026 17:56:17 +0000 Message-ID: <20260121000000.0000000-1-va@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: <20260116-tegra_xfer-v1-0-02d96c790619@debian.org> <20260120112242.3766700-1-va@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF000044A3:EE_|LV3PR12MB9355:EE_ X-MS-Office365-Filtering-Correlation-Id: c79d3230-b1f9-40f1-e68e-08de59166c82 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|36860700013|82310400026; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Jan 2026 17:56:37.6151 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c79d3230-b1f9-40f1-e68e-08de59166c82 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000044A3.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV3PR12MB9355 Hi Breno, After reviewing Mark Brown's feedback and the code carefully, let me clarify the correct logic. This is important to get right. **IRQ Handler Semantics (per Mark Brown):** - IRQ_NONE = interrupt was NOT from this device - IRQ_HANDLED = interrupt WAS from this device (regardless of whether we fully processed it) **The QSPI_RDY Bit:** This bit in QSPI_TRANS_STATUS is set by hardware when a transfer completes and triggers the interrupt. Software clears it by writing 1. **Why Your Original v1 Logic is Correct:** Your "[PATCH 1/6] spi: tegra210-quad: Return IRQ_HANDLED when timeout already processed transfer" reads QSPI_TRANS_STATUS at the start of tegra_qspi_isr_thread(): if (!tqspi->curr_xfer) { if (!(status & QSPI_RDY)) return IRQ_NONE; // HW never set RDY → spurious interrupt return IRQ_HANDLED; // HW did set RDY → real interrupt, timeout processed it } **Scenario 1 - Delayed ISR (the race you're fixing):** 1. HW completes transfer, sets QSPI_RDY, interrupt fires 2. ISR thread delayed (CPU busy) 3. Timeout handler runs, processes transfer, clears curr_xfer 4. Delayed ISR finally wakes up 5. Reads QSPI_RDY (may still be set) 6. curr_xfer is NULL 7. Return IRQ_HANDLED → this WAS our interrupt, just processed by timeout **Scenario 2 - Truly Spurious:** 1. Spurious interrupt fires 2. QSPI_RDY = 0 (no transfer completed) 3. curr_xfer is NULL 4. Return IRQ_NONE → not our interrupt **Your Latest Proposal Has It Backwards:** The version in your last email returns IRQ_HANDLED when QSPI_RDY is NOT set, which is incorrect per Mark's feedback. **For v2:** Patches 1-5: Keep as-is from v1 (all correct) Patch 6 ("[PATCH 6/6] spi: tegra210-quad: Protect curr_xfer check in IRQ handler"): The TODO comment you added asks about keeping the lock held across the handler call. I'd suggest removing the TODO and replacing it with a comment explaining why the current approach is safe: spin_unlock_irqrestore(&tqspi->lock, flags); /* * Lock is released here but handlers safely re-check curr_xfer under lock * before dereferencing. DMA handler also needs to sleep in * wait_for_completion_*(), which cannot be done while holding spinlock. */ if (!tqspi->is_curr_dma_xfer) return handle_cpu_based_xfer(tqspi); This documents the design decision and closes the TODO. The device_reset_optional() was from your March 2025 series - keep that separate. **Testing:** Carol Soto will validate v2 with your test methodology and provide feedback. **Follow-on:** I'll implement hard IRQ handler support separately after your fix merges. Best, Vishwaroop