[PATCH v2 0/2] ti-sci-intr: Support level+pulse interrupt sources together

[PATCH v2 0/2] ti-sci-intr: Support level+pulse interrupt sources together

[Aniket Limaye]

The interrupt router does not support interrupt type conversion and
forwards both level and pulse interrupts to the parent (GIC) unchanged.

Hence update the INTR bindings and driver such that
1. If "ti,intr-trigger-type" is equal to IRQ_TYPE_DEFAULT, parse the
   interrupt-type declared by the source, per-line, and use that to
   allocate interrupt from its interrupt-parent.
2. Else, the global setting specified for the property is used for all
   output lines. This maintains compatibility with existing platform
   DTs with no changes.

This change is needed because:
main_i2c4 on J722S is a level type interrupt source while the rest of
the interrupt sources for Main GPIOMUX INTR router are pulse interrupts.
main_i2c4 on J722S is not present in it's dts yet and will be added
through another patch series after this one gets merged.

Testing:
- Enable I2C4 (additional DT patch) on j722s-evm and run i2cdetect [0].
- Add testcode to ignore the NACK interrupt, which results in an irq
  storm -> showing that GIC is actually receiving level interrupt from
  the INTR [1].

[0]: https://gist.github.com/aniket-l/01d4e943b7b6db54b38eb7e99ed5e2b9#file-j722s-evm-i2c4-logs-working-txt
[1]: https://gist.github.com/aniket-l/01d4e943b7b6db54b38eb7e99ed5e2b9#file-j722s-evm-i2c4-logs-nack-storm-txt

Signed-off-by: Aniket Limaye <a-limaye@ti.com>
---
Changes in v2:
- Use correct Patch Subject prefix
- Reword Commit msgs to better describe the patches
- Fix function argument alignment as per coding style
- Fix variable declaration ordering as per coding style
- Link to v1: https://lore.kernel.org/r/20260116-ul-driver-i2c-j722s-v1-0-c28e8ba38a9e@ti.com

---
Aniket Limaye (2):
      dt-bindings: interrupt-controller: ti,sci-intr: Per-line interrupt-types
      irqchip/ti-sci-intr: Allow parsing interrupt-types per-line

 .../bindings/interrupt-controller/ti,sci-intr.yaml | 42 ++++++++++++++++---
 drivers/irqchip/irq-ti-sci-intr.c                  | 49 +++++++++++++++++-----
 2 files changed, 75 insertions(+), 16 deletions(-)
---
base-commit: b71e635feefc852405b14620a7fc58c4c80c0f73
change-id: 20260116-ul-driver-i2c-j722s-48f223899dbd

Best regards,
-- 
Aniket Limaye <a-limaye@ti.com>

[PATCH v2 1/2] dt-bindings: interrupt-controller: ti,sci-intr: Per-line interrupt-types

[Aniket Limaye]

Update the bindings to allow setting per-line interrupt-types.

Some Interrupt Router instances can only work with a specific trigger
type (edge or level), while others act as simple passthroughs that
preserve the source interrupt type unchanged.

In addition to existing edge or level interrupt setting, add a third
enum value 15 (IRQ_TYPE_DEFAULT) for "ti,intr-trigger-type" property, to
indicate that the router acts as a passthrough. When set to 15,
"#interrupt-cells" must be 2 to allow each interrupt source to specify
its trigger type per-line.

Signed-off-by: Aniket Limaye <a-limaye@ti.com>
---
Changes in v2:
- Reword Commit msg to better describe the patch
- Link to v1: https://lore.kernel.org/r/20260116-ul-driver-i2c-j722s-v1-1-c28e8ba38a9e@ti.com
---
 .../bindings/interrupt-controller/ti,sci-intr.yaml | 42 +++++++++++++++++++---
 1 file changed, 37 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml
index c99cc7323c71..59c01f327f3b 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml
@@ -15,8 +15,7 @@ allOf:
 description: |
   The Interrupt Router (INTR) module provides a mechanism to mux M
   interrupt inputs to N interrupt outputs, where all M inputs are selectable
-  to be driven per N output. An Interrupt Router can either handle edge
-  triggered or level triggered interrupts and that is fixed in hardware.
+  to be driven per N output.
 
                                    Interrupt Router
                                +----------------------+
@@ -52,11 +51,12 @@ properties:
 
   ti,intr-trigger-type:
     $ref: /schemas/types.yaml#/definitions/uint32
-    enum: [1, 4]
+    enum: [1, 4, 15]
     description: |
       Should be one of the following.
         1 = If intr supports edge triggered interrupts.
         4 = If intr supports level triggered interrupts.
+        15 = If intr preserves the source interrupt type.
 
   reg:
     maxItems: 1
@@ -64,9 +64,14 @@ properties:
   interrupt-controller: true
 
   '#interrupt-cells':
-    const: 1
+    enum: [1, 2]
     description: |
-      The 1st cell should contain interrupt router input hw number.
+      Number of cells in interrupt specifier. Depends on ti,intr-trigger-type:
+      - If ti,intr-trigger-type is 1 or 4: must be 1
+        The 1st cell should contain interrupt router input hw number.
+      - If ti,intr-trigger-type is 15: must be 2
+        The 1st cell should contain interrupt router input hw number.
+        The 2nd cell should contain interrupt trigger type (preserved by router).
 
   ti,interrupt-ranges:
     $ref: /schemas/types.yaml#/definitions/uint32-matrix
@@ -82,6 +87,21 @@ properties:
         - description: |
             "limit" specifies the limit for translation
 
+if:
+  properties:
+    ti,intr-trigger-type:
+      enum: [1, 4]
+then:
+  properties:
+    '#interrupt-cells':
+      const: 1
+      description: Interrupt ID only. Interrupt type is specified globally
+else:
+  properties:
+    '#interrupt-cells':
+      const: 2
+      description: Interrupt ID and corresponding interrupt type
+
 required:
   - compatible
   - ti,intr-trigger-type
@@ -105,3 +125,15 @@ examples:
         ti,sci-dev-id = <131>;
         ti,interrupt-ranges = <0 360 32>;
     };
+
+  - |
+    main_gpio_intr1: interrupt-controller1 {
+        compatible = "ti,sci-intr";
+        ti,intr-trigger-type = <15>;
+        interrupt-controller;
+        interrupt-parent = <&gic500>;
+        #interrupt-cells = <2>;
+        ti,sci = <&dmsc>;
+        ti,sci-dev-id = <131>;
+        ti,interrupt-ranges = <0 360 32>;
+    };

-- 
2.52.0

[PATCH v2 2/2] irqchip/ti-sci-intr: Allow parsing interrupt-types per-line

[Aniket Limaye]

Some INTR router instances act as simple passthroughs that preserve the
source interrupt type unchanged at the output line, rather than converting
all interrupts to a fixed type.

When interrupt sources are not homogeneous with respect to trigger type,
the driver needs to read each source's interrupt type from DT and pass it
unchanged to its interrupt parent.

Add support for "ti,intr-trigger-type" = 15 (IRQ_TYPE_DEFAULT) to
indicate passthrough mode. When set to 15, parse interrupt type per-line
from the DT fwspec provided by the interrupt source. Else, use the
global setting for all interrupt lines.

Signed-off-by: Aniket Limaye <a-limaye@ti.com>

---
Changes in v2:
- Use correct Patch Subject prefix
- Reword Commit msg to better describe the patch
- Fix function argument alignment as per coding style
- Fix variable declaration ordering as per coding style
- Link to v1: https://lore.kernel.org/r/20260116-ul-driver-i2c-j722s-v1-2-c28e8ba38a9e@ti.com
---
 drivers/irqchip/irq-ti-sci-intr.c | 49 ++++++++++++++++++++++++++++++---------
 1 file changed, 38 insertions(+), 11 deletions(-)

diff --git a/drivers/irqchip/irq-ti-sci-intr.c b/drivers/irqchip/irq-ti-sci-intr.c
index 354613e74ad0..e0b06796c86e 100644
--- a/drivers/irqchip/irq-ti-sci-intr.c
+++ b/drivers/irqchip/irq-ti-sci-intr.c
@@ -61,11 +61,22 @@ static int ti_sci_intr_irq_domain_translate(struct irq_domain *domain,
 {
 	struct ti_sci_intr_irq_domain *intr = domain->host_data;
 
-	if (fwspec->param_count != 1)
-		return -EINVAL;
 
-	*hwirq = fwspec->param[0];
-	*type = intr->type;
+	if (intr->type != IRQ_TYPE_DEFAULT) {
+		/* Global interrupt-type */
+		if (fwspec->param_count != 1)
+			return -EINVAL;
+
+		*hwirq = fwspec->param[0];
+		*type = intr->type;
+	} else {
+		/* Per-Line interrupt-type */
+		if (fwspec->param_count != 2)
+			return -EINVAL;
+
+		*hwirq = fwspec->param[0];
+		*type = fwspec->param[1];
+	}
 
 	return 0;
 }
@@ -128,11 +139,12 @@ static void ti_sci_intr_irq_domain_free(struct irq_domain *domain,
  * @domain:	Pointer to the interrupt router IRQ domain
  * @virq:	Corresponding Linux virtual IRQ number
  * @hwirq:	Corresponding hwirq for the IRQ within this IRQ domain
+ * @hwirq_type:	Corresponding hwirq trigger type for the IRQ within this IRQ domain
  *
  * Returns intr output irq if all went well else appropriate error pointer.
  */
 static int ti_sci_intr_alloc_parent_irq(struct irq_domain *domain,
-					unsigned int virq, u32 hwirq)
+					unsigned int virq, u32 hwirq, u32 hwirq_type)
 {
 	struct ti_sci_intr_irq_domain *intr = domain->host_data;
 	struct device_node *parent_node;
@@ -156,11 +168,26 @@ static int ti_sci_intr_alloc_parent_irq(struct irq_domain *domain,
 		fwspec.param_count = 3;
 		fwspec.param[0] = 0;	/* SPI */
 		fwspec.param[1] = p_hwirq - 32; /* SPI offset */
-		fwspec.param[2] = intr->type;
+		fwspec.param[2] = hwirq_type;
 	} else {
 		/* Parent is Interrupt Router */
-		fwspec.param_count = 1;
-		fwspec.param[0] = p_hwirq;
+		u32 parent_trigger_type;
+
+		err = of_property_read_u32(parent_node, "ti,intr-trigger-type",
+					   &parent_trigger_type);
+		if (err)
+			goto err_irqs;
+
+		if (parent_trigger_type != IRQ_TYPE_DEFAULT) {
+			/* Parent has global trigger type */
+			fwspec.param_count = 1;
+			fwspec.param[0] = p_hwirq;
+		} else {
+			/* Parent supports per-line trigger types */
+			fwspec.param_count = 2;
+			fwspec.param[0] = p_hwirq;
+			fwspec.param[1] = hwirq_type;
+		}
 	}
 
 	err = irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec);
@@ -196,15 +223,15 @@ static int ti_sci_intr_irq_domain_alloc(struct irq_domain *domain,
 					void *data)
 {
 	struct irq_fwspec *fwspec = data;
+	unsigned int hwirq_type;
 	unsigned long hwirq;
-	unsigned int flags;
 	int err, out_irq;
 
-	err = ti_sci_intr_irq_domain_translate(domain, fwspec, &hwirq, &flags);
+	err = ti_sci_intr_irq_domain_translate(domain, fwspec, &hwirq, &hwirq_type);
 	if (err)
 		return err;
 
-	out_irq = ti_sci_intr_alloc_parent_irq(domain, virq, hwirq);
+	out_irq = ti_sci_intr_alloc_parent_irq(domain, virq, hwirq, hwirq_type);
 	if (out_irq < 0)
 		return out_irq;
 

-- 
2.52.0

Re: [PATCH v2 1/2] dt-bindings: interrupt-controller: ti,sci-intr: Per-line interrupt-types

[Rob Herring]

On Tue, Jan 20, 2026 at 04:13:46PM +0530, Aniket Limaye wrote:
> Update the bindings to allow setting per-line interrupt-types.
> 
> Some Interrupt Router instances can only work with a specific trigger
> type (edge or level), while others act as simple passthroughs that
> preserve the source interrupt type unchanged.
> 
> In addition to existing edge or level interrupt setting, add a third
> enum value 15 (IRQ_TYPE_DEFAULT) for "ti,intr-trigger-type" property, to
> indicate that the router acts as a passthrough. When set to 15,
> "#interrupt-cells" must be 2 to allow each interrupt source to specify
> its trigger type per-line.
> 
> Signed-off-by: Aniket Limaye <a-limaye@ti.com>
> ---
> Changes in v2:
> - Reword Commit msg to better describe the patch
> - Link to v1: https://lore.kernel.org/r/20260116-ul-driver-i2c-j722s-v1-1-c28e8ba38a9e@ti.com
> ---
>  .../bindings/interrupt-controller/ti,sci-intr.yaml | 42 +++++++++++++++++++---
>  1 file changed, 37 insertions(+), 5 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml
> index c99cc7323c71..59c01f327f3b 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml
> @@ -15,8 +15,7 @@ allOf:
>  description: |
>    The Interrupt Router (INTR) module provides a mechanism to mux M
>    interrupt inputs to N interrupt outputs, where all M inputs are selectable
> -  to be driven per N output. An Interrupt Router can either handle edge
> -  triggered or level triggered interrupts and that is fixed in hardware.
> +  to be driven per N output.
>  
>                                     Interrupt Router
>                                 +----------------------+
> @@ -52,11 +51,12 @@ properties:
>  
>    ti,intr-trigger-type:
>      $ref: /schemas/types.yaml#/definitions/uint32
> -    enum: [1, 4]
> +    enum: [1, 4, 15]
>      description: |
>        Should be one of the following.
>          1 = If intr supports edge triggered interrupts.
>          4 = If intr supports level triggered interrupts.
> +        15 = If intr preserves the source interrupt type.

Why do you need this property in this case? #interrupt-cells == 2 means 
preserve the source type and this is redundant. Just disallow 
ti,intr-trigger-type when #interrupt-cells == 2.

Rob

Re: [PATCH v2 1/2] dt-bindings: interrupt-controller: ti,sci-intr: Per-line interrupt-types

[Aniket Limaye]

Hello Rob,


On 21/01/26 21:26, Rob Herring wrote:
> On Tue, Jan 20, 2026 at 04:13:46PM +0530, Aniket Limaye wrote:
>> Update the bindings to allow setting per-line interrupt-types.
>>
>> Some Interrupt Router instances can only work with a specific trigger
>> type (edge or level), while others act as simple passthroughs that
>> preserve the source interrupt type unchanged.
>>
>> In addition to existing edge or level interrupt setting, add a third
>> enum value 15 (IRQ_TYPE_DEFAULT) for "ti,intr-trigger-type" property, to
>> indicate that the router acts as a passthrough. When set to 15,
>> "#interrupt-cells" must be 2 to allow each interrupt source to specify
>> its trigger type per-line.
>>
>> Signed-off-by: Aniket Limaye <a-limaye@ti.com>
>> ---
>> Changes in v2:
>> - Reword Commit msg to better describe the patch
>> - Link to v1: https://lore.kernel.org/r/20260116-ul-driver-i2c-j722s-v1-1-c28e8ba38a9e@ti.com
>> ---
>>   .../bindings/interrupt-controller/ti,sci-intr.yaml | 42 +++++++++++++++++++---
>>   1 file changed, 37 insertions(+), 5 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml
>> index c99cc7323c71..59c01f327f3b 100644
>> --- a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml
>> +++ b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml
>> @@ -15,8 +15,7 @@ allOf:
>>   description: |
>>     The Interrupt Router (INTR) module provides a mechanism to mux M
>>     interrupt inputs to N interrupt outputs, where all M inputs are selectable
>> -  to be driven per N output. An Interrupt Router can either handle edge
>> -  triggered or level triggered interrupts and that is fixed in hardware.
>> +  to be driven per N output.
>>   
>>                                      Interrupt Router
>>                                  +----------------------+
>> @@ -52,11 +51,12 @@ properties:
>>   
>>     ti,intr-trigger-type:
>>       $ref: /schemas/types.yaml#/definitions/uint32
>> -    enum: [1, 4]
>> +    enum: [1, 4, 15]
>>       description: |
>>         Should be one of the following.
>>           1 = If intr supports edge triggered interrupts.
>>           4 = If intr supports level triggered interrupts.
>> +        15 = If intr preserves the source interrupt type.
> 
> Why do you need this property in this case? #interrupt-cells == 2 means
> preserve the source type and this is redundant. Just disallow
> ti,intr-trigger-type when #interrupt-cells == 2.
> 
> Rob


Yep, I agree.

I will send a v2 which makes this property optional instead... such that 
it's absence <=> #interrupt-cells == 2

Thanks for the review!

Regards,
Aniket