From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from MTA-06-4.privateemail.com (mta-06-4.privateemail.com [198.54.122.146]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2EF1729A9FA for ; Fri, 23 Jan 2026 00:06:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.54.122.146 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769126826; cv=none; b=eef2wRXgqhgvAMPHiAa4660ya2fPGESZXf2Ez2lWFKco8jH5YMvHkMjX8hOQTc7mQEHPEGoUFbfPxvFQwjvjtd3QjStvtbVVFIRtRWyPVaOYAZ+3z6Wa47wZ46FkTah8UKiJai6KcS5nCO2GAHCs6maprUe29rUcsZSj9zgCGuI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769126826; c=relaxed/simple; bh=qV/ZjH6Z1PC/mxCEzK+U+nPH8TlEU0tyH0dX5Hn4K5Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=FqI0oBIYyYd76cEZAytftON0v6xHJOqm4g7Fb1wnZDZNEec2kJQtVEdJrgbHZERv3cAyzZcKmZVYR4h5VS9CXuJvyxWz3qleWyw25hm/DEhAr+nvRujqOtCdk1QB5g2BJyVmAtK8DmnIFvToF9uefDYsXhr/wFP1wtI0MUL1PH4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=effective-light.com; spf=pass smtp.mailfrom=effective-light.com; arc=none smtp.client-ip=198.54.122.146 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=effective-light.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=effective-light.com Received: from localhost.localdomain (bras-base-toroon4332w-grc-44-142-112-152-160.dsl.bell.ca [142.112.152.160]) by mta-06.privateemail.com (Postfix) with ESMTPA id 4dxyry36k8z3hhTH; Thu, 22 Jan 2026 19:06:25 -0500 (EST) From: Hamza Mahfooz To: dri-devel@lists.freedesktop.org Cc: Hamza Mahfooz , Alex Deucher , =?UTF-8?q?Christian=20K=C3=B6nig?= , David Airlie , Simona Vetter , Harry Wentland , Leo Li , Rodrigo Siqueira , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Sunil Khatri , Lijo Lazar , Ce Sun , Ivan Lipski , Kenneth Feng , Alex Hung , Tom Chung , Melissa Wen , =?UTF-8?q?Michel=20D=C3=A4nzer?= , Fangzhi Zuo , =?UTF-8?q?Timur=20Krist=C3=B3f?= , amd-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] drm/amdgpu: implement page_flip_timeout() support Date: Thu, 22 Jan 2026 19:05:28 -0500 Message-ID: <20260123000537.2450496-2-someguy@effective-light.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260123000537.2450496-1-someguy@effective-light.com> References: <20260123000537.2450496-1-someguy@effective-light.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit We now have a means to respond to page flip timeouts. So, hook up support for the new page_flip_timeout() callback. Signed-off-by: Hamza Mahfooz --- Hi, I have tested this on 7940HS system and it appears even a MODE2 reset will reset display firmware, so I don't think we need to force a full reset here. --- drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c | 2 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h | 1 + .../drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c | 18 ++++++++++++++++++ 3 files changed, 21 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c index 28c4ad62f50e..bd63f0345984 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c @@ -343,6 +343,8 @@ void amdgpu_reset_get_desc(struct amdgpu_reset_context *rst_ctxt, char *buf, case AMDGPU_RESET_SRC_USERQ: strscpy(buf, "user queue trigger", len); break; + case AMDGPU_RESET_SRC_DISPLAY: + strscpy(buf, "display hang", len); default: strscpy(buf, "unknown", len); } diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h index 07b4d37f1db6..53b577062b11 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h @@ -44,6 +44,7 @@ enum AMDGPU_RESET_SRCS { AMDGPU_RESET_SRC_HWS, AMDGPU_RESET_SRC_USER, AMDGPU_RESET_SRC_USERQ, + AMDGPU_RESET_SRC_DISPLAY, }; struct amdgpu_reset_context { diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c index 697e232acebf..2233e5b3b6a2 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c @@ -28,6 +28,7 @@ #include "dc.h" #include "amdgpu.h" +#include "amdgpu_reset.h" #include "amdgpu_dm_psr.h" #include "amdgpu_dm_replay.h" #include "amdgpu_dm_crtc.h" @@ -578,12 +579,29 @@ amdgpu_dm_atomic_crtc_get_property(struct drm_crtc *crtc, } #endif +static void amdgpu_dm_crtc_handle_timeout(struct drm_crtc *crtc) +{ + struct amdgpu_device *adev = drm_to_adev(crtc->dev); + struct amdgpu_reset_context reset_context = {0}; + + if (amdgpu_device_should_recover_gpu(adev)) { + memset(&reset_context, 0, sizeof(reset_context)); + + reset_context.method = AMD_RESET_METHOD_NONE; + reset_context.reset_req_dev = adev; + reset_context.src = AMDGPU_RESET_SRC_DISPLAY; + + amdgpu_device_gpu_recover(adev, NULL, &reset_context); + } +} + /* Implemented only the options currently available for the driver */ static const struct drm_crtc_funcs amdgpu_dm_crtc_funcs = { .reset = amdgpu_dm_crtc_reset_state, .destroy = amdgpu_dm_crtc_destroy, .set_config = drm_atomic_helper_set_config, .page_flip = drm_atomic_helper_page_flip, + .page_flip_timeout = amdgpu_dm_crtc_handle_timeout, .atomic_duplicate_state = amdgpu_dm_crtc_duplicate_state, .atomic_destroy_state = amdgpu_dm_crtc_destroy_state, .set_crc_source = amdgpu_dm_crtc_set_crc_source, -- 2.52.0