From: Jason Gunthorpe <jgg@nvidia.com>
To: Pranjal Shrivastava <praan@google.com>
Cc: Nicolin Chen <nicolinc@nvidia.com>,
will@kernel.org, jean-philippe@linaro.org, robin.murphy@arm.com,
joro@8bytes.org, balbirs@nvidia.com, miko.lenczewski@arm.com,
peterz@infradead.org, kevin.tian@intel.com,
linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v9 6/7] iommu/arm-smmu-v3: Add arm_smmu_invs based arm_smmu_domain_inv_range()
Date: Fri, 23 Jan 2026 09:56:00 -0400 [thread overview]
Message-ID: <20260123135600.GX1134360@nvidia.com> (raw)
In-Reply-To: <aXND9YJTwm6om689@google.com>
On Fri, Jan 23, 2026 at 09:48:37AM +0000, Pranjal Shrivastava wrote:
> For INV_TYPE_S1_ASID, the new code loops and checks size_too_big
> via arm_smmu_inv_to_cmdq_batch. However, for INV_TYPE_ATS, it issues
> a single command for the entire range. While this matches the current
> driver, are we confident arm_smmu_atc_inv_to_cmd handles all massive
> sizes correctly without needing a similar loop or "too big" fallback?
At the PCI level ATS invalidations accept an arbitary byte range, so
all ranges should be converted into a single CMDQ command and pushed
as a single TLP.
The issue the "too big" stuff is solving is for the IOTLB itself which
can require an invalidation rage to be exploded into many smaller
commands.
Jason
next prev parent reply other threads:[~2026-01-23 13:56 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-19 20:11 [PATCH v9 0/7] iommu/arm-smmu-v3: Introduce an RCU-protected invalidation array Nicolin Chen
2025-12-19 20:11 ` [PATCH v9 1/7] iommu/arm-smmu-v3: Explicitly set smmu_domain->stage for SVA Nicolin Chen
2026-01-23 9:49 ` Pranjal Shrivastava
2025-12-19 20:11 ` [PATCH v9 2/7] iommu/arm-smmu-v3: Add an inline arm_smmu_domain_free() Nicolin Chen
2026-01-23 9:50 ` Pranjal Shrivastava
2025-12-19 20:11 ` [PATCH v9 3/7] iommu/arm-smmu-v3: Introduce a per-domain arm_smmu_invs array Nicolin Chen
2026-01-23 9:53 ` Pranjal Shrivastava
2026-01-23 17:03 ` Will Deacon
2026-01-23 17:35 ` Nicolin Chen
2026-01-23 17:51 ` Will Deacon
2026-01-23 17:56 ` Nicolin Chen
2026-01-23 19:16 ` Jason Gunthorpe
2026-01-23 19:18 ` Nicolin Chen
2026-01-26 14:54 ` Will Deacon
2026-01-26 15:21 ` Jason Gunthorpe
2025-12-19 20:11 ` [PATCH v9 4/7] iommu/arm-smmu-v3: Pre-allocate a per-master invalidation array Nicolin Chen
2026-01-23 9:54 ` Pranjal Shrivastava
2025-12-19 20:11 ` [PATCH v9 5/7] iommu/arm-smmu-v3: Populate smmu_domain->invs when attaching masters Nicolin Chen
2025-12-19 20:11 ` [PATCH v9 6/7] iommu/arm-smmu-v3: Add arm_smmu_invs based arm_smmu_domain_inv_range() Nicolin Chen
2026-01-23 9:48 ` Pranjal Shrivastava
2026-01-23 13:56 ` Jason Gunthorpe [this message]
2026-01-27 16:38 ` Nicolin Chen
2026-01-27 17:08 ` Jason Gunthorpe
2026-01-27 18:07 ` Nicolin Chen
2026-01-27 18:23 ` Jason Gunthorpe
2026-01-27 18:37 ` Nicolin Chen
2026-01-27 19:19 ` Jason Gunthorpe
2026-01-27 20:14 ` Nicolin Chen
2026-01-28 0:05 ` Jason Gunthorpe
2026-01-23 17:05 ` Will Deacon
2026-01-23 17:10 ` Will Deacon
2026-01-23 17:43 ` Nicolin Chen
2026-01-23 20:03 ` Jason Gunthorpe
2026-01-26 13:01 ` Will Deacon
2026-01-26 15:20 ` Jason Gunthorpe
2026-01-26 16:02 ` Will Deacon
2026-01-26 16:09 ` Jason Gunthorpe
2026-01-26 18:56 ` Will Deacon
2026-01-27 3:14 ` Nicolin Chen
2026-01-26 17:50 ` Nicolin Chen
2025-12-19 20:11 ` [PATCH v9 7/7] iommu/arm-smmu-v3: Perform per-domain invalidations using arm_smmu_invs Nicolin Chen
2026-01-23 17:07 ` Will Deacon
2026-01-23 17:47 ` Nicolin Chen
2026-01-23 19:59 ` Jason Gunthorpe
2026-01-19 17:10 ` [PATCH v9 0/7] iommu/arm-smmu-v3: Introduce an RCU-protected invalidation array Nicolin Chen
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