Re: [PATCH RFCv1 3/3] iommu/arm-smmu-v3: Allow ATS to be always on

[Jason Gunthorpe <jgg@nvidia.com>]

On Mon, Jan 26, 2026 at 10:40:39AM -0800, Nicolin Chen wrote:
> On Mon, Jan 26, 2026 at 01:20:20PM -0400, Jason Gunthorpe wrote:
> > On Mon, Jan 26, 2026 at 12:39:50PM +0000, Will Deacon wrote:
> > > > +	ret = arm_smmu_alloc_cd_tables(master);
> > > > +	if (ret)
> > > > +		return ret;
> > > 
> > > Were do you allocate the second level entry for ssid 0 if we're using
> > > 2-level cd tables?
> > 
> > I don't think we need to. The entire design here has a non-valid CD entry
> > for SSID 0.
> 
> Hmm, whether we allocate a 2-level cd table would actually depend on
> the "1 << cd_table->s1cdmax" v.s. CTXDESC_L2_ENTRIES, right?
> 
> If the device supports PASID and s1cdmax is large, we should prepare
> a 2-level cd tables, even if only SSID0 is used at this moment since
> we have to support !0 pasids via potential SVA domains.
> 
> In all Other cases, we would prepare a linear one.

Yes, this is what arm_smmu_alloc_cd_tables() is doing.

I think will was questioning if this needs to be
arm_smmu_alloc_cd_ptr(master, 0);

To ensure there is some memory under the SSID=0 case, but it seems we
don't need that.

Jason