Re: [PATCH v2 01/10] iommu/arm-smmu-v3: Store IOTLB cache tags in struct arm_smmu_attach_state

[Jason Gunthorpe <jgg@nvidia.com>]

On Mon, Jan 26, 2026 at 07:23:58PM -0800, Nicolin Chen wrote:
> On Mon, Jan 26, 2026 at 04:44:43PM -0400, Jason Gunthorpe wrote:
> > On Wed, Jan 21, 2026 at 05:24:19PM -0800, Nicolin Chen wrote:
> > > +int arm_smmu_domain_get_iotlb_tag(struct arm_smmu_domain *smmu_domain,
> > > +				  struct arm_smmu_device *smmu,
> > > +				  struct arm_smmu_inv *tag)
> > > +{
> > > +	/* Decide the type of the iotlb cache tag */
> > > +	switch (smmu_domain->stage) {
> > > +	case ARM_SMMU_DOMAIN_SVA:
> > > +	case ARM_SMMU_DOMAIN_S1:
> > > +		tag->type = INV_TYPE_S1_ASID;
> > > +		break;
> > > +	case ARM_SMMU_DOMAIN_S2:
> > > +		tag->type = INV_TYPE_S2_VMID;
> > > +		break;
> > > +	default:
> > > +		return -EINVAL;
> > > +	}
> > > +
> > > +	tag->smmu = smmu;
> > > +
> > > +	if (tag->type == INV_TYPE_S1_ASID)
> > > +		tag->id = smmu_domain->cd.asid;
> > > +	else
> > > +		tag->id = smmu_domain->s2_cfg.vmid;
> > 
> > Would be tidier to move these up into the case
> 
> This will act as a fake allocation path in PATCh-3 and eventually
> get replaced with a real allocation piece in PATCH-4. So, I wrote
> like this in a transitory manner.

I'd still write it in the nice way, you can remove the lines later
when you add the allocation logic.

Jason