From: Thomas Gleixner <tglx@kernel.org>
To: LKML <linux-kernel@vger.kernel.org>
Cc: Ihor Solodrai <ihor.solodrai@linux.dev>,
Shrikanth Hegde <sshegde@linux.ibm.com>,
Peter Zijlstra <peterz@infradead.org>,
Mathieu Desnoyers <mathieu.desnoyers@efficios.com>,
Michael Jeanson <mjeanson@efficios.com>
Subject: [patch 0/4] sched/mmcid: Cure mode transition woes
Date: Thu, 29 Jan 2026 22:20:46 +0100 [thread overview]
Message-ID: <20260129210219.452851594@kernel.org> (raw)
Ihor and Shrikanth reported hard lockups which can be tracked back to the recent
rewrite of the MM_CID management code.
1) The from task to CPU ownership transition lacks the intermediate
transition mode, which can lead to CID pool exhaustion and a
subsequent live lock. That intermediate mode was implemented for the
reverse operation already but omitted for this transition as the
original analysis missed a few possible scheduling scenarios.
2) Weakly ordered architectures can observe inconsistent state which
causes them to make the wrong decision. That leads to the same problem
as with #1.
The following series addresses these issue and fixes another albeit harmless
inconsistent state hickup which was found when analysing the above issues.
With these issues addressed the last change optimizes the bitmap
utilization in the transition modes.
The series applies on Linus tree and passes the selftests and a thread pool
emulator which stress tests the ownership transitions.
Thanks,
tglx
---
include/linux/rseq_types.h | 7 -
kernel/sched/core.c | 170 +++++++++++++++++++++++++++++----------------
kernel/sched/sched.h | 45 +++++++++--
3 files changed, 151 insertions(+), 71 deletions(-)
next reply other threads:[~2026-01-29 21:20 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-29 21:20 Thomas Gleixner [this message]
2026-01-29 21:20 ` [patch 1/4] sched/mmcid: Prevent live lock on task to CPU mode transition Thomas Gleixner
2026-01-30 15:24 ` Mathieu Desnoyers
2026-01-30 16:17 ` Thomas Gleixner
2026-01-29 21:20 ` [patch 2/4] sched/mmcid: Protect transition on weakly ordered systems Thomas Gleixner
2026-01-30 15:36 ` Mathieu Desnoyers
2026-01-30 16:16 ` Thomas Gleixner
2026-01-30 15:43 ` Mathieu Desnoyers
2026-01-30 18:50 ` Shrikanth Hegde
2026-01-30 18:58 ` Mathieu Desnoyers
2026-01-31 6:10 ` Shrikanth Hegde
2026-01-29 21:20 ` [patch 3/4] sched/mmcid: Drop per CPU CID immediately when switching to per task mode Thomas Gleixner
2026-01-30 15:38 ` Mathieu Desnoyers
2026-01-29 21:20 ` [patch 4/4] sched/mmcid: Optimize transitional CIDs when scheduling out Thomas Gleixner
2026-01-30 15:50 ` Mathieu Desnoyers
2026-01-30 16:13 ` Thomas Gleixner
2026-01-30 16:29 ` Mathieu Desnoyers
2026-01-30 0:20 ` [patch 0/4] sched/mmcid: Cure mode transition woes Ihor Solodrai
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