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From: Jason Gunthorpe <jgg@nvidia.com>
To: Wei Wang <wei.w.wang@hotmail.com>
Cc: bhelgaas@google.com, akpm@linux-foundation.org, bp@alien8.de,
	rdunlap@infradead.org, alex@shazbot.org, kevin.tian@intel.com,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH v3 2/2] PCI: Add the enhanced ACS controls check to pci_acs_flags_enabled()
Date: Mon, 2 Feb 2026 12:03:24 -0400	[thread overview]
Message-ID: <20260202160324.GT2223369@nvidia.com> (raw)
In-Reply-To: <SI2PR01MB4393537C4A9D8081FDC6B8EDDC9AA@SI2PR01MB4393.apcprd01.prod.exchangelabs.com>

On Mon, Feb 02, 2026 at 07:33:35PM +0800, Wei Wang wrote:
> +static bool pci_acs_ecap_enabled(struct pci_dev *pdev, u16 ctrl)
> +{
> +	struct pci_dev *usp_pdev = pci_upstream_bridge(pdev);
> +	u16 mask = PCI_ACS_DMAC_RB | PCI_ACS_DMAC_RR;
> +
> +	/*
> +	 * For ACS DSP/USP Memory Target Access Control, either Request
> +	 * Redirect or Request Blocking must be enabled to enforce isolation.
> +	 * According to PCIe spec 7.0, the DSP Memory Target Access is
> +	 * applicable to both Root Ports and Switch Upstream Ports that have
> +	 * applicable Memory BAR space to protect. So if the device does not
> +	 * have a Memory BAR, it skips the check.
> +	 */
> +	if (pci_dev_has_memory_bars(pdev) &&
> +	    (ctrl & mask) != PCI_ACS_DMAC_RB &&
> +	    (ctrl & mask) != PCI_ACS_DMAC_RR)
> +		return false;
> +
> +	mask = PCI_ACS_UMAC_RB | PCI_ACS_UMAC_RR;
> +	/*
> +	 * The USP Memory Target Access is only applicable to downstream ports
> +	 * that have applicable Memory BAR space in the Switch Upstream Port to
> +	 * protect. Root Ports, which have usp_pdev set to NULL, will skip the
> +	 * check.
> +	 */
> +	if (usp_pdev && pci_dev_has_memory_bars(usp_pdev) &&
> +	    (ctrl & mask) != PCI_ACS_UMAC_RB &&
> +	    (ctrl & mask) != PCI_ACS_UMAC_RR)
> +		return false;

I'm not sure about using this logic to detect a USP, it would be
better to drive it off PCI_EXP_TYPE_DOWNSTREAM

Everything else looks OK though

Jason

  reply	other threads:[~2026-02-02 16:03 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-02 11:33 [PATCH v3 0/2] PCI: Add support for ACS Enhanced Capability Wei Wang
2026-02-02 11:33 ` [PATCH v3 1/2] PCI: Enable the enhanced ACS controls introduced by PCI_ACS_ECAP Wei Wang
2026-02-02 16:02   ` Jason Gunthorpe
2026-02-02 11:33 ` [PATCH v3 2/2] PCI: Add the enhanced ACS controls check to pci_acs_flags_enabled() Wei Wang
2026-02-02 16:03   ` Jason Gunthorpe [this message]
2026-02-03  9:59     ` Wei Wang

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