From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from courrier.aliel.fr (pouet.aliel.fr [65.21.61.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4D9322FDC40; Wed, 18 Feb 2026 10:19:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=65.21.61.41 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771409995; cv=none; b=ak5WOFzW7Hi2GAAleaRMnO/MqWAzWyCiXYX9vnvvunn74h1/hi64cNfrW2uoDEIB9Zv44rwe7mMXyND2+pDZikCdskkvakhUN27DZeLLH/RXu+n8zOySSP/D67YKbNNP2w7ulRFiUhCBSCRsNO3x5F35ii1AuRbOxAs8bCinU64= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771409995; c=relaxed/simple; bh=1mPXmmMne05pYAaucmru6rWTvugDQH1iZH4JWLruXfI=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=mT8GxIGPSKhymxHN8D1ZmvSABGIMhCVT+l2mDK8ItMIELZJZts+tVhis/mCXjXiWDjQu/YQnfgIQ92nWX8xQrBorRjkNQQmE4dSyN24lHola7U5Tefa84WuvCoOY73PmxlswyfmaY2wEQfr11ul0gQo14G+qyGVtaBzl7SyxHfc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=aliel.fr; spf=pass smtp.mailfrom=aliel.fr; dkim=pass (1024-bit key) header.d=aliel.fr header.i=@aliel.fr header.b=j+fNq8Zn; arc=none smtp.client-ip=65.21.61.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=aliel.fr Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aliel.fr Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=aliel.fr header.i=@aliel.fr header.b="j+fNq8Zn" Received: from localhost.localdomain (2A02-842B-8136-0001-B865-661d-5641-E7C6.rev.sfr.net [IPv6:2a02:842b:8136:1:b865:661d:5641:e7c6]) by courrier.aliel.fr (Postfix) with ESMTPSA id 9E0B14A551; Wed, 18 Feb 2026 10:19:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=aliel.fr; s=courrier-s1; t=1771409991; bh=1mPXmmMne05pYAaucmru6rWTvugDQH1iZH4JWLruXfI=; h=From:To:Cc:Subject:Date; b=j+fNq8ZnvCqilBeAnFnjfbYRubTFgYCojnKlGGQ0cd8iJJRFhFJ7C/H0ES/a3oUC7 LU2RAVJbNLMtib7tpnwImc+rG9ki1afJfF+Kq4hVkS0/jVYzMyGZ3riL4O2vuqM40R 4jdFOvVJDHh4B07YFyDm2JuB7StrhuJSGikg0RFQ= From: Ronald Claveau To: linux-amlogic@lists.infradead.org Cc: Ronald Claveau , Neil Armstrong , Jerome Brunet , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jian Hu , Xianwei Zhao , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/7] dt-bindings: clk: meson: Add Amlogic T7 fix pll support Date: Wed, 18 Feb 2026 11:19:02 +0100 Message-ID: <20260218101904.35541-1-linux-kernel-dev@aliel.fr> X-Mailer: git-send-email 2.49.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add PLL for the clock controller of the Amlogic T7 SoC family. Signed-off-by: Ronald Claveau --- .../devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml index 49c61f65deff..6a1598e6c359 100644 --- a/Documentation/devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml +++ b/Documentation/devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml @@ -23,6 +23,7 @@ properties: - amlogic,t7-mpll - amlogic,t7-hdmi-pll - amlogic,t7-mclk-pll + - amlogic,t7-fpll reg: maxItems: 1 @@ -42,6 +43,7 @@ properties: - const: in0 - const: in1 - const: in2 + - const: xtal minItems: 1 required: @@ -72,11 +74,12 @@ allOf: contains: enum: - amlogic,t7-gp0-pll - - amlogic,t7-gp1--pll + - amlogic,t7-gp1-pll - amlogic,t7-hifi-pll - amlogic,t7-pcie-pll - amlogic,t7-mpll - amlogic,t7-hdmi-pll + - amlogic,t7-fpll then: properties: -- 2.49.0