* Re: [PATCH v2] x86/hyperv: Reserve 3 interrupt vectors used exclusively by mshv
2026-02-17 23:11 [PATCH v2] x86/hyperv: Reserve 3 interrupt vectors used exclusively by mshv Mukesh R
@ 2026-02-18 6:49 ` Wei Liu
2026-02-18 7:17 ` Wei Liu
` (3 subsequent siblings)
4 siblings, 0 replies; 9+ messages in thread
From: Wei Liu @ 2026-02-18 6:49 UTC (permalink / raw)
To: Mukesh R
Cc: linux-hyperv, linux-kernel, kys, haiyangz, wei.liu, decui, longli,
tglx, mingo, bp, dave.hansen, x86, hpa
On Tue, Feb 17, 2026 at 03:11:58PM -0800, Mukesh R wrote:
> From: Mukesh Rathor <mrathor@linux.microsoft.com>
>
> MSVC compiler, used to compile the Microsoft Hyper-V hypervisor currently,
> has an assert intrinsic that uses interrupt vector 0x29 to create an
> exception. This will cause hypervisor to then crash and collect core. As
> such, if this interrupt number is assigned to a device by Linux and the
> device generates it, hypervisor will crash. There are two other such
> vectors hard coded in the hypervisor, 0x2C and 0x2D for debug purposes.
> Fortunately, the three vectors are part of the kernel driver space and
> that makes it feasible to reserve them early so they are not assigned
> later.
>
> Signed-off-by: Mukesh Rathor <mrathor@linux.microsoft.com>
Queued. I also did a few cosmetic changes to this patch.
Wei
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH v2] x86/hyperv: Reserve 3 interrupt vectors used exclusively by mshv
2026-02-17 23:11 [PATCH v2] x86/hyperv: Reserve 3 interrupt vectors used exclusively by mshv Mukesh R
2026-02-18 6:49 ` Wei Liu
@ 2026-02-18 7:17 ` Wei Liu
2026-02-18 7:38 ` kernel test robot
` (2 subsequent siblings)
4 siblings, 0 replies; 9+ messages in thread
From: Wei Liu @ 2026-02-18 7:17 UTC (permalink / raw)
To: Mukesh R
Cc: linux-hyperv, linux-kernel, kys, haiyangz, wei.liu, decui, longli,
tglx, mingo, bp, dave.hansen, x86, hpa
On Tue, Feb 17, 2026 at 03:11:58PM -0800, Mukesh R wrote:
> From: Mukesh Rathor <mrathor@linux.microsoft.com>
>
> MSVC compiler, used to compile the Microsoft Hyper-V hypervisor currently,
> has an assert intrinsic that uses interrupt vector 0x29 to create an
> exception. This will cause hypervisor to then crash and collect core. As
> such, if this interrupt number is assigned to a device by Linux and the
> device generates it, hypervisor will crash. There are two other such
> vectors hard coded in the hypervisor, 0x2C and 0x2D for debug purposes.
> Fortunately, the three vectors are part of the kernel driver space and
> that makes it feasible to reserve them early so they are not assigned
> later.
>
> Signed-off-by: Mukesh Rathor <mrathor@linux.microsoft.com>
> ---
>
> v1: Add ifndef CONFIG_X86_FRED (thanks hpa)
> v2: replace ifndef with cpu_feature_enabled() (thanks hpa and tglx)
>
> arch/x86/kernel/cpu/mshyperv.c | 27 +++++++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
> index 579fb2c64cfd..88ca127dc6d4 100644
> --- a/arch/x86/kernel/cpu/mshyperv.c
> +++ b/arch/x86/kernel/cpu/mshyperv.c
> @@ -478,6 +478,28 @@ int hv_get_hypervisor_version(union hv_hypervisor_version_info *info)
> }
> EXPORT_SYMBOL_GPL(hv_get_hypervisor_version);
>
> +/*
> + * Reserve vectors hard coded in the hypervisor. If used outside, the hypervisor
> + * will either crash or hang or attempt to break into debugger.
> + */
> +static void hv_reserve_irq_vectors(void)
> +{
> + #define HYPERV_DBG_FASTFAIL_VECTOR 0x29
> + #define HYPERV_DBG_ASSERT_VECTOR 0x2C
> + #define HYPERV_DBG_SERVICE_VECTOR 0x2D
> +
> + if (cpu_feature_enabled(X86_FEATURE_FRED))
> + return;
> +
> + if (test_and_set_bit(HYPERV_DBG_ASSERT_VECTOR, system_vectors) ||
> + test_and_set_bit(HYPERV_DBG_SERVICE_VECTOR, system_vectors) ||
> + test_and_set_bit(HYPERV_DBG_FASTFAIL_VECTOR, system_vectors))
> + BUG();
> +
> + pr_info("Hyper-V:reserve vectors: %d %d %d\n", HYPERV_DBG_ASSERT_VECTOR,
> + HYPERV_DBG_SERVICE_VECTOR, HYPERV_DBG_FASTFAIL_VECTOR);
> +}
> +
> static void __init ms_hyperv_init_platform(void)
> {
> int hv_max_functions_eax, eax;
> @@ -510,6 +532,11 @@ static void __init ms_hyperv_init_platform(void)
>
> hv_identify_partition_type();
>
> +#ifndef CONFIG_X86_FRED
> + if (hv_root_partition())
> + hv_reserve_irq_vectors();
> +#endif /* CONFIG_X86_FRED */
> +
On a CONFIG_X86_FRED=y system, this call is skipped. However, the kernel
may not have FRED active, so the vectors should still be reserved.
I think the function should always be called.
Wei
> if (cc_platform_has(CC_ATTR_SNP_SECURE_AVIC))
> ms_hyperv.hints |= HV_DEPRECATING_AEOI_RECOMMENDED;
>
> --
> 2.51.2.vfs.0.1
>
>
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH v2] x86/hyperv: Reserve 3 interrupt vectors used exclusively by mshv
2026-02-17 23:11 [PATCH v2] x86/hyperv: Reserve 3 interrupt vectors used exclusively by mshv Mukesh R
2026-02-18 6:49 ` Wei Liu
2026-02-18 7:17 ` Wei Liu
@ 2026-02-18 7:38 ` kernel test robot
2026-02-18 12:35 ` kernel test robot
2026-02-20 17:14 ` Michael Kelley
4 siblings, 0 replies; 9+ messages in thread
From: kernel test robot @ 2026-02-18 7:38 UTC (permalink / raw)
To: Mukesh R, linux-hyperv, linux-kernel
Cc: oe-kbuild-all, kys, haiyangz, wei.liu, decui, longli, tglx, mingo,
bp, dave.hansen, x86, hpa
Hi Mukesh,
kernel test robot noticed the following build warnings:
[auto build test WARNING on tip/x86/core]
[also build test WARNING on linus/master v6.19 next-20260217]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Mukesh-R/x86-hyperv-Reserve-3-interrupt-vectors-used-exclusively-by-mshv/20260218-071406
base: tip/x86/core
patch link: https://lore.kernel.org/r/20260217231158.1184736-1-mrathor%40linux.microsoft.com
patch subject: [PATCH v2] x86/hyperv: Reserve 3 interrupt vectors used exclusively by mshv
config: x86_64-rhel-9.4-ltp (https://download.01.org/0day-ci/archive/20260218/202602180851.Pi2PY5LX-lkp@intel.com/config)
compiler: gcc-14 (Debian 14.2.0-19) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260218/202602180851.Pi2PY5LX-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202602180851.Pi2PY5LX-lkp@intel.com/
All warnings (new ones prefixed by >>):
>> arch/x86/kernel/cpu/mshyperv.c:485:13: warning: 'hv_reserve_irq_vectors' defined but not used [-Wunused-function]
485 | static void hv_reserve_irq_vectors(void)
| ^~~~~~~~~~~~~~~~~~~~~~
vim +/hv_reserve_irq_vectors +485 arch/x86/kernel/cpu/mshyperv.c
480
481 /*
482 * Reserve vectors hard coded in the hypervisor. If used outside, the hypervisor
483 * will either crash or hang or attempt to break into debugger.
484 */
> 485 static void hv_reserve_irq_vectors(void)
486 {
487 #define HYPERV_DBG_FASTFAIL_VECTOR 0x29
488 #define HYPERV_DBG_ASSERT_VECTOR 0x2C
489 #define HYPERV_DBG_SERVICE_VECTOR 0x2D
490
491 if (cpu_feature_enabled(X86_FEATURE_FRED))
492 return;
493
494 if (test_and_set_bit(HYPERV_DBG_ASSERT_VECTOR, system_vectors) ||
495 test_and_set_bit(HYPERV_DBG_SERVICE_VECTOR, system_vectors) ||
496 test_and_set_bit(HYPERV_DBG_FASTFAIL_VECTOR, system_vectors))
497 BUG();
498
499 pr_info("Hyper-V:reserve vectors: %d %d %d\n", HYPERV_DBG_ASSERT_VECTOR,
500 HYPERV_DBG_SERVICE_VECTOR, HYPERV_DBG_FASTFAIL_VECTOR);
501 }
502
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH v2] x86/hyperv: Reserve 3 interrupt vectors used exclusively by mshv
2026-02-17 23:11 [PATCH v2] x86/hyperv: Reserve 3 interrupt vectors used exclusively by mshv Mukesh R
` (2 preceding siblings ...)
2026-02-18 7:38 ` kernel test robot
@ 2026-02-18 12:35 ` kernel test robot
2026-02-20 17:14 ` Michael Kelley
4 siblings, 0 replies; 9+ messages in thread
From: kernel test robot @ 2026-02-18 12:35 UTC (permalink / raw)
To: Mukesh R, linux-hyperv, linux-kernel
Cc: oe-kbuild-all, kys, haiyangz, wei.liu, decui, longli, tglx, mingo,
bp, dave.hansen, x86, hpa
Hi Mukesh,
kernel test robot noticed the following build warnings:
[auto build test WARNING on tip/x86/core]
[also build test WARNING on linus/master v6.19 next-20260217]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Mukesh-R/x86-hyperv-Reserve-3-interrupt-vectors-used-exclusively-by-mshv/20260218-071406
base: tip/x86/core
patch link: https://lore.kernel.org/r/20260217231158.1184736-1-mrathor%40linux.microsoft.com
patch subject: [PATCH v2] x86/hyperv: Reserve 3 interrupt vectors used exclusively by mshv
config: x86_64-rhel-9.4 (https://download.01.org/0day-ci/archive/20260218/202602182000.O5dSFVVd-lkp@intel.com/config)
compiler: gcc-14 (Debian 14.2.0-19) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260218/202602182000.O5dSFVVd-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202602182000.O5dSFVVd-lkp@intel.com/
All warnings (new ones prefixed by >>):
>> arch/x86/kernel/cpu/mshyperv.c:485:13: warning: 'hv_reserve_irq_vectors' defined but not used [-Wunused-function]
485 | static void hv_reserve_irq_vectors(void)
| ^~~~~~~~~~~~~~~~~~~~~~
vim +/hv_reserve_irq_vectors +485 arch/x86/kernel/cpu/mshyperv.c
480
481 /*
482 * Reserve vectors hard coded in the hypervisor. If used outside, the hypervisor
483 * will either crash or hang or attempt to break into debugger.
484 */
> 485 static void hv_reserve_irq_vectors(void)
486 {
487 #define HYPERV_DBG_FASTFAIL_VECTOR 0x29
488 #define HYPERV_DBG_ASSERT_VECTOR 0x2C
489 #define HYPERV_DBG_SERVICE_VECTOR 0x2D
490
491 if (cpu_feature_enabled(X86_FEATURE_FRED))
492 return;
493
494 if (test_and_set_bit(HYPERV_DBG_ASSERT_VECTOR, system_vectors) ||
495 test_and_set_bit(HYPERV_DBG_SERVICE_VECTOR, system_vectors) ||
496 test_and_set_bit(HYPERV_DBG_FASTFAIL_VECTOR, system_vectors))
497 BUG();
498
499 pr_info("Hyper-V:reserve vectors: %d %d %d\n", HYPERV_DBG_ASSERT_VECTOR,
500 HYPERV_DBG_SERVICE_VECTOR, HYPERV_DBG_FASTFAIL_VECTOR);
501 }
502
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 9+ messages in thread* RE: [PATCH v2] x86/hyperv: Reserve 3 interrupt vectors used exclusively by mshv
2026-02-17 23:11 [PATCH v2] x86/hyperv: Reserve 3 interrupt vectors used exclusively by mshv Mukesh R
` (3 preceding siblings ...)
2026-02-18 12:35 ` kernel test robot
@ 2026-02-20 17:14 ` Michael Kelley
2026-02-20 18:45 ` Wei Liu
4 siblings, 1 reply; 9+ messages in thread
From: Michael Kelley @ 2026-02-20 17:14 UTC (permalink / raw)
To: Mukesh R, linux-hyperv@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org,
decui@microsoft.com, longli@microsoft.com, tglx@linutronix.de,
mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com,
x86@kernel.org, hpa@zytor.com
From: Mukesh R <mrathor@linux.microsoft.com> Sent: Tuesday, February 17, 2026 3:12 PM
>
> MSVC compiler, used to compile the Microsoft Hyper-V hypervisor currently,
> has an assert intrinsic that uses interrupt vector 0x29 to create an
> exception. This will cause hypervisor to then crash and collect core. As
> such, if this interrupt number is assigned to a device by Linux and the
> device generates it, hypervisor will crash. There are two other such
> vectors hard coded in the hypervisor, 0x2C and 0x2D for debug purposes.
> Fortunately, the three vectors are part of the kernel driver space and
> that makes it feasible to reserve them early so they are not assigned
> later.
>
> Signed-off-by: Mukesh Rathor <mrathor@linux.microsoft.com>
> ---
>
> v1: Add ifndef CONFIG_X86_FRED (thanks hpa)
> v2: replace ifndef with cpu_feature_enabled() (thanks hpa and tglx)
>
> arch/x86/kernel/cpu/mshyperv.c | 27 +++++++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
> index 579fb2c64cfd..88ca127dc6d4 100644
> --- a/arch/x86/kernel/cpu/mshyperv.c
> +++ b/arch/x86/kernel/cpu/mshyperv.c
> @@ -478,6 +478,28 @@ int hv_get_hypervisor_version(union hv_hypervisor_version_info *info)
> }
> EXPORT_SYMBOL_GPL(hv_get_hypervisor_version);
>
> +/*
> + * Reserve vectors hard coded in the hypervisor. If used outside, the hypervisor
> + * will either crash or hang or attempt to break into debugger.
> + */
> +static void hv_reserve_irq_vectors(void)
> +{
> + #define HYPERV_DBG_FASTFAIL_VECTOR 0x29
> + #define HYPERV_DBG_ASSERT_VECTOR 0x2C
> + #define HYPERV_DBG_SERVICE_VECTOR 0x2D
> +
> + if (cpu_feature_enabled(X86_FEATURE_FRED))
> + return;
> +
> + if (test_and_set_bit(HYPERV_DBG_ASSERT_VECTOR, system_vectors) ||
> + test_and_set_bit(HYPERV_DBG_SERVICE_VECTOR, system_vectors) ||
> + test_and_set_bit(HYPERV_DBG_FASTFAIL_VECTOR, system_vectors))
> + BUG();
> +
> + pr_info("Hyper-V:reserve vectors: %d %d %d\n", HYPERV_DBG_ASSERT_VECTOR,
> + HYPERV_DBG_SERVICE_VECTOR, HYPERV_DBG_FASTFAIL_VECTOR);
I'm a little late to the party here, but I've always seen Intel interrupt vectors
displayed as 2-digit hex numbers. This info message is displaying decimal,
which is atypical and will probably be confusing.
Michael
> +}
> +
> static void __init ms_hyperv_init_platform(void)
> {
> int hv_max_functions_eax, eax;
> @@ -510,6 +532,11 @@ static void __init ms_hyperv_init_platform(void)
>
> hv_identify_partition_type();
>
> +#ifndef CONFIG_X86_FRED
> + if (hv_root_partition())
> + hv_reserve_irq_vectors();
> +#endif /* CONFIG_X86_FRED */
> +
> if (cc_platform_has(CC_ATTR_SNP_SECURE_AVIC))
> ms_hyperv.hints |= HV_DEPRECATING_AEOI_RECOMMENDED;
>
> --
> 2.51.2.vfs.0.1
>
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH v2] x86/hyperv: Reserve 3 interrupt vectors used exclusively by mshv
2026-02-20 17:14 ` Michael Kelley
@ 2026-02-20 18:45 ` Wei Liu
2026-02-20 18:56 ` Mukesh R
0 siblings, 1 reply; 9+ messages in thread
From: Wei Liu @ 2026-02-20 18:45 UTC (permalink / raw)
To: Michael Kelley
Cc: Mukesh R, linux-hyperv@vger.kernel.org,
linux-kernel@vger.kernel.org, kys@microsoft.com,
haiyangz@microsoft.com, wei.liu@kernel.org, decui@microsoft.com,
longli@microsoft.com, tglx@linutronix.de, mingo@redhat.com,
bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org,
hpa@zytor.com
On Fri, Feb 20, 2026 at 05:14:26PM +0000, Michael Kelley wrote:
> From: Mukesh R <mrathor@linux.microsoft.com> Sent: Tuesday, February 17, 2026 3:12 PM
> >
> > MSVC compiler, used to compile the Microsoft Hyper-V hypervisor currently,
> > has an assert intrinsic that uses interrupt vector 0x29 to create an
> > exception. This will cause hypervisor to then crash and collect core. As
> > such, if this interrupt number is assigned to a device by Linux and the
> > device generates it, hypervisor will crash. There are two other such
> > vectors hard coded in the hypervisor, 0x2C and 0x2D for debug purposes.
> > Fortunately, the three vectors are part of the kernel driver space and
> > that makes it feasible to reserve them early so they are not assigned
> > later.
> >
> > Signed-off-by: Mukesh Rathor <mrathor@linux.microsoft.com>
> > ---
> >
> > v1: Add ifndef CONFIG_X86_FRED (thanks hpa)
> > v2: replace ifndef with cpu_feature_enabled() (thanks hpa and tglx)
> >
> > arch/x86/kernel/cpu/mshyperv.c | 27 +++++++++++++++++++++++++++
> > 1 file changed, 27 insertions(+)
> >
> > diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
> > index 579fb2c64cfd..88ca127dc6d4 100644
> > --- a/arch/x86/kernel/cpu/mshyperv.c
> > +++ b/arch/x86/kernel/cpu/mshyperv.c
> > @@ -478,6 +478,28 @@ int hv_get_hypervisor_version(union hv_hypervisor_version_info *info)
> > }
> > EXPORT_SYMBOL_GPL(hv_get_hypervisor_version);
> >
> > +/*
> > + * Reserve vectors hard coded in the hypervisor. If used outside, the hypervisor
> > + * will either crash or hang or attempt to break into debugger.
> > + */
> > +static void hv_reserve_irq_vectors(void)
> > +{
> > + #define HYPERV_DBG_FASTFAIL_VECTOR 0x29
> > + #define HYPERV_DBG_ASSERT_VECTOR 0x2C
> > + #define HYPERV_DBG_SERVICE_VECTOR 0x2D
> > +
> > + if (cpu_feature_enabled(X86_FEATURE_FRED))
> > + return;
> > +
> > + if (test_and_set_bit(HYPERV_DBG_ASSERT_VECTOR, system_vectors) ||
> > + test_and_set_bit(HYPERV_DBG_SERVICE_VECTOR, system_vectors) ||
> > + test_and_set_bit(HYPERV_DBG_FASTFAIL_VECTOR, system_vectors))
> > + BUG();
> > +
> > + pr_info("Hyper-V:reserve vectors: %d %d %d\n", HYPERV_DBG_ASSERT_VECTOR,
> > + HYPERV_DBG_SERVICE_VECTOR, HYPERV_DBG_FASTFAIL_VECTOR);
>
> I'm a little late to the party here, but I've always seen Intel interrupt vectors
> displayed as 2-digit hex numbers. This info message is displaying decimal,
> which is atypical and will probably be confusing.
Noted. The pull request to Linus has been sent. We will change the
format in a follow up patch.
Wei
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH v2] x86/hyperv: Reserve 3 interrupt vectors used exclusively by mshv
2026-02-20 18:45 ` Wei Liu
@ 2026-02-20 18:56 ` Mukesh R
2026-02-24 16:29 ` Wei Liu
0 siblings, 1 reply; 9+ messages in thread
From: Mukesh R @ 2026-02-20 18:56 UTC (permalink / raw)
To: Wei Liu, Michael Kelley
Cc: linux-hyperv@vger.kernel.org, linux-kernel@vger.kernel.org,
kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com,
longli@microsoft.com, tglx@linutronix.de, mingo@redhat.com,
bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org,
hpa@zytor.com
On 2/20/26 10:45, Wei Liu wrote:
> On Fri, Feb 20, 2026 at 05:14:26PM +0000, Michael Kelley wrote:
>> From: Mukesh R <mrathor@linux.microsoft.com> Sent: Tuesday, February 17, 2026 3:12 PM
>>>
>>> MSVC compiler, used to compile the Microsoft Hyper-V hypervisor currently,
>>> has an assert intrinsic that uses interrupt vector 0x29 to create an
>>> exception. This will cause hypervisor to then crash and collect core. As
>>> such, if this interrupt number is assigned to a device by Linux and the
>>> device generates it, hypervisor will crash. There are two other such
>>> vectors hard coded in the hypervisor, 0x2C and 0x2D for debug purposes.
>>> Fortunately, the three vectors are part of the kernel driver space and
>>> that makes it feasible to reserve them early so they are not assigned
>>> later.
>>>
>>> Signed-off-by: Mukesh Rathor <mrathor@linux.microsoft.com>
>>> ---
>>>
>>> v1: Add ifndef CONFIG_X86_FRED (thanks hpa)
>>> v2: replace ifndef with cpu_feature_enabled() (thanks hpa and tglx)
>>>
>>> arch/x86/kernel/cpu/mshyperv.c | 27 +++++++++++++++++++++++++++
>>> 1 file changed, 27 insertions(+)
>>>
>>> diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
>>> index 579fb2c64cfd..88ca127dc6d4 100644
>>> --- a/arch/x86/kernel/cpu/mshyperv.c
>>> +++ b/arch/x86/kernel/cpu/mshyperv.c
>>> @@ -478,6 +478,28 @@ int hv_get_hypervisor_version(union hv_hypervisor_version_info *info)
>>> }
>>> EXPORT_SYMBOL_GPL(hv_get_hypervisor_version);
>>>
>>> +/*
>>> + * Reserve vectors hard coded in the hypervisor. If used outside, the hypervisor
>>> + * will either crash or hang or attempt to break into debugger.
>>> + */
>>> +static void hv_reserve_irq_vectors(void)
>>> +{
>>> + #define HYPERV_DBG_FASTFAIL_VECTOR 0x29
>>> + #define HYPERV_DBG_ASSERT_VECTOR 0x2C
>>> + #define HYPERV_DBG_SERVICE_VECTOR 0x2D
>>> +
>>> + if (cpu_feature_enabled(X86_FEATURE_FRED))
>>> + return;
>>> +
>>> + if (test_and_set_bit(HYPERV_DBG_ASSERT_VECTOR, system_vectors) ||
>>> + test_and_set_bit(HYPERV_DBG_SERVICE_VECTOR, system_vectors) ||
>>> + test_and_set_bit(HYPERV_DBG_FASTFAIL_VECTOR, system_vectors))
>>> + BUG();
>>> +
>>> + pr_info("Hyper-V:reserve vectors: %d %d %d\n", HYPERV_DBG_ASSERT_VECTOR,
>>> + HYPERV_DBG_SERVICE_VECTOR, HYPERV_DBG_FASTFAIL_VECTOR);
>>
>> I'm a little late to the party here, but I've always seen Intel interrupt vectors
>> displayed as 2-digit hex numbers. This info message is displaying decimal,
>> which is atypical and will probably be confusing.
>
> Noted. The pull request to Linus has been sent. We will change the
> format in a follow up patch.
Well, there is no 0x prefix, so should not be confusing, but no big
deal, whatever.....
Thanks,
-Mukesh
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH v2] x86/hyperv: Reserve 3 interrupt vectors used exclusively by mshv
2026-02-20 18:56 ` Mukesh R
@ 2026-02-24 16:29 ` Wei Liu
0 siblings, 0 replies; 9+ messages in thread
From: Wei Liu @ 2026-02-24 16:29 UTC (permalink / raw)
To: Mukesh R
Cc: Wei Liu, Michael Kelley, linux-hyperv@vger.kernel.org,
linux-kernel@vger.kernel.org, kys@microsoft.com,
haiyangz@microsoft.com, decui@microsoft.com, longli@microsoft.com,
tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com
On Fri, Feb 20, 2026 at 10:56:07AM -0800, Mukesh R wrote:
> On 2/20/26 10:45, Wei Liu wrote:
> > On Fri, Feb 20, 2026 at 05:14:26PM +0000, Michael Kelley wrote:
> > > From: Mukesh R <mrathor@linux.microsoft.com> Sent: Tuesday, February 17, 2026 3:12 PM
> > > >
> > > > MSVC compiler, used to compile the Microsoft Hyper-V hypervisor currently,
> > > > has an assert intrinsic that uses interrupt vector 0x29 to create an
> > > > exception. This will cause hypervisor to then crash and collect core. As
> > > > such, if this interrupt number is assigned to a device by Linux and the
> > > > device generates it, hypervisor will crash. There are two other such
> > > > vectors hard coded in the hypervisor, 0x2C and 0x2D for debug purposes.
> > > > Fortunately, the three vectors are part of the kernel driver space and
> > > > that makes it feasible to reserve them early so they are not assigned
> > > > later.
> > > >
> > > > Signed-off-by: Mukesh Rathor <mrathor@linux.microsoft.com>
> > > > ---
> > > >
> > > > v1: Add ifndef CONFIG_X86_FRED (thanks hpa)
> > > > v2: replace ifndef with cpu_feature_enabled() (thanks hpa and tglx)
> > > >
> > > > arch/x86/kernel/cpu/mshyperv.c | 27 +++++++++++++++++++++++++++
> > > > 1 file changed, 27 insertions(+)
> > > >
> > > > diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
> > > > index 579fb2c64cfd..88ca127dc6d4 100644
> > > > --- a/arch/x86/kernel/cpu/mshyperv.c
> > > > +++ b/arch/x86/kernel/cpu/mshyperv.c
> > > > @@ -478,6 +478,28 @@ int hv_get_hypervisor_version(union hv_hypervisor_version_info *info)
> > > > }
> > > > EXPORT_SYMBOL_GPL(hv_get_hypervisor_version);
> > > >
> > > > +/*
> > > > + * Reserve vectors hard coded in the hypervisor. If used outside, the hypervisor
> > > > + * will either crash or hang or attempt to break into debugger.
> > > > + */
> > > > +static void hv_reserve_irq_vectors(void)
> > > > +{
> > > > + #define HYPERV_DBG_FASTFAIL_VECTOR 0x29
> > > > + #define HYPERV_DBG_ASSERT_VECTOR 0x2C
> > > > + #define HYPERV_DBG_SERVICE_VECTOR 0x2D
> > > > +
> > > > + if (cpu_feature_enabled(X86_FEATURE_FRED))
> > > > + return;
> > > > +
> > > > + if (test_and_set_bit(HYPERV_DBG_ASSERT_VECTOR, system_vectors) ||
> > > > + test_and_set_bit(HYPERV_DBG_SERVICE_VECTOR, system_vectors) ||
> > > > + test_and_set_bit(HYPERV_DBG_FASTFAIL_VECTOR, system_vectors))
> > > > + BUG();
> > > > +
> > > > + pr_info("Hyper-V:reserve vectors: %d %d %d\n", HYPERV_DBG_ASSERT_VECTOR,
> > > > + HYPERV_DBG_SERVICE_VECTOR, HYPERV_DBG_FASTFAIL_VECTOR);
> > >
> > > I'm a little late to the party here, but I've always seen Intel interrupt vectors
> > > displayed as 2-digit hex numbers. This info message is displaying decimal,
> > > which is atypical and will probably be confusing.
> >
> > Noted. The pull request to Linus has been sent. We will change the
> > format in a follow up patch.
>
> Well, there is no 0x prefix, so should not be confusing, but no big
> deal, whatever.....
>
When I change these I will add the 0x prefix as well.
Wei
> Thanks,
> -Mukesh
>
>
>
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