From: Anand Moon <linux.amoon@gmail.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Jonathan Hunter" <jonathanh@nvidia.com>,
"Aaron Kling" <webgeek1234@gmail.com>,
linux-tegra@vger.kernel.org (open list:PCI DRIVER FOR NVIDIA
TEGRA),
linux-pci@vger.kernel.org (open list:PCI DRIVER FOR NVIDIA TEGRA),
devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
FLATTENED DEVICE TREE BINDINGS),
linux-kernel@vger.kernel.org (open list)
Cc: Anand Moon <linux.amoon@gmail.com>
Subject: [PATCH v3 2/5] arm64: dts: tegra: tegra186-p2771: Fix invalid PCIe nvidia,num-lanes
Date: Tue, 24 Feb 2026 17:48:58 +0530 [thread overview]
Message-ID: <20260224121948.25218-3-linux.amoon@gmail.com> (raw)
In-Reply-To: <20260224121948.25218-1-linux.amoon@gmail.com>
NVIDIA Tegra PCIe binding schema (nvidia,tegra-pcie.yaml) defines
nvidia,num-lanes with an enum of [1, 2, 4]. The value <0> for the
pci@2,0 node is invalid and causes a dtbs_check validation failure.
Update the lane count to <1> to comply with the binding constraints.
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
v3: new patch
http://devicetree.org/schemas/pci/nvidia,tegra-pcie.yaml
/media/nvme0/mainline/linux-tegra-6.y-devel/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dtb: pcie@10003000 (nvidia,tegra186-pcie): pci@2,0:nvidia,num-lanes: 0 is not one of [1, 2, 4]
from schema $id: http://devicetree.org/schemas/pci/nvidia,tegra-pcie.yaml
DTC [C] arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dtb
---
arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
index 8b3736cee323..b4c6bfb09ce2 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
@@ -2433,7 +2433,7 @@ pci@1,0 {
};
pci@2,0 {
- nvidia,num-lanes = <0>;
+ nvidia,num-lanes = <1>;
status = "disabled";
};
--
2.50.1
next prev parent reply other threads:[~2026-02-24 12:20 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-24 12:18 [PATCH v3 0/5] PCI: tegra: A couple of cleanups Anand Moon
2026-02-24 12:18 ` [PATCH v3 1/5] dt-bindings: PCI: Convert nvidia,tegra-pcie to DT schema Anand Moon
2026-03-06 0:43 ` Rob Herring
2026-03-11 6:46 ` Anand Moon
2026-02-24 12:18 ` Anand Moon [this message]
2026-02-24 12:18 ` [PATCH v3 3/5] PCI: tegra: Simplify clock handling by using clk_bulk*() functions Anand Moon
2026-02-24 12:19 ` [PATCH v3 4/5] PCI: tegra: Use readl_poll_timeout() for link status polling Anand Moon
2026-02-24 12:19 ` [PATCH v3 5/5] PCI: tegra: Use BIT() and GENMASK() macros for register definitions Anand Moon
2026-03-05 6:12 ` [PATCH v3 0/5] PCI: tegra: A couple of cleanups Manivannan Sadhasivam
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