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AJvYcCUJBZR/D9ZpwwUYpgoaOB/RT+YNi4uzKYI9E4YM/dvgpBx6DP5tPc921ReUG/gSwTngV9FgFz/noUeSu34=@vger.kernel.org X-Gm-Message-State: AOJu0YwcRZWd5ylmcsUGZZ2O6Yus9rY6alcpJh+mcSO0SbNv2dcIubUR fRofDySUuRV8HC79Bmd8oaDsT4lxqXRVw7GyhPGFk8GmzUdfmfxSbm0J7qBovKenKGdWfS1+Hdp nbHtwtg2MGQ== X-Received: from dybia18.prod.google.com ([2002:a05:7301:312:b0:2ae:3309:a304]) (user=irogers job=prod-delivery.src-stubby-dispatcher) by 2002:a05:7300:df41:b0:2b7:1b54:6081 with SMTP id 5a478bee46e88-2bd7baed292mr8598146eec.11.1772081595621; Wed, 25 Feb 2026 20:53:15 -0800 (PST) Date: Wed, 25 Feb 2026 20:52:56 -0800 In-Reply-To: <20260226045301.459948-1-irogers@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260226045301.459948-1-irogers@google.com> X-Mailer: git-send-email 2.53.0.414.gf7e9f6c205-goog Message-ID: <20260226045301.459948-5-irogers@google.com> Subject: [PATCH v1 05/10] perf vendor events intel: Update graniterapids events from 1.16 to 1.17 From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , James Clark , "=?UTF-8?q?Andreas=20F=C3=A4rber?=" , Manivannan Sadhasivam , Dapeng Mi , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable The updated events were published in: https://github.com/intel/perfmon/commit/c9ebc3ff9c3d408a888fbfbe73d386ef86c= 7306f With new IO and SNC metrics in: https://github.com/intel/perfmon/commit/04cf5e1e804afd775401167870d48cd2586= 4be7b https://github.com/intel/perfmon/commit/98b2602d83de6625bae1e6fcaab3a39b0a3= 41255 Signed-off-by: Ian Rogers --- .../arch/x86/graniterapids/frontend.json | 16 +++++++++++ .../arch/x86/graniterapids/gnr-metrics.json | 27 +++++++++++++++++++ tools/perf/pmu-events/arch/x86/mapfile.csv | 2 +- 3 files changed, 44 insertions(+), 1 deletion(-) diff --git a/tools/perf/pmu-events/arch/x86/graniterapids/frontend.json b/t= ools/perf/pmu-events/arch/x86/graniterapids/frontend.json index d580d305c926..1fdeaebb739f 100644 --- a/tools/perf/pmu-events/arch/x86/graniterapids/frontend.json +++ b/tools/perf/pmu-events/arch/x86/graniterapids/frontend.json @@ -325,6 +325,22 @@ "SampleAfterValue": "200003", "UMask": "0x4" }, + { + "BriefDescription": "ICACHE_TAG.STALLS_INUSE", + "Counter": "0,1,2,3", + "EventCode": "0x83", + "EventName": "ICACHE_TAG.STALLS_INUSE", + "SampleAfterValue": "200003", + "UMask": "0x10" + }, + { + "BriefDescription": "ICACHE_TAG.STALLS_ISB", + "Counter": "0,1,2,3", + "EventCode": "0x83", + "EventName": "ICACHE_TAG.STALLS_ISB", + "SampleAfterValue": "200003", + "UMask": "0x8" + }, { "BriefDescription": "Cycles Decode Stream Buffer (DSB) is deliveri= ng any Uop", "Counter": "0,1,2,3", diff --git a/tools/perf/pmu-events/arch/x86/graniterapids/gnr-metrics.json = b/tools/perf/pmu-events/arch/x86/graniterapids/gnr-metrics.json index cc3c834ca286..299631fb8d53 100644 --- a/tools/perf/pmu-events/arch/x86/graniterapids/gnr-metrics.json +++ b/tools/perf/pmu-events/arch/x86/graniterapids/gnr-metrics.json @@ -143,6 +143,12 @@ "MetricName": "io_full_write_l3_miss", "ScaleUnit": "100%" }, + { + "BriefDescription": "The number of times per second that ownership= of a cacheline was stolen from the integrated IO controller before it was = able to write back the modified line", + "MetricExpr": "(UNC_I_MISC1.LOST_FWD + UNC_I_MISC1.SEC_RCVD_INVLD)= / duration_time", + "MetricName": "io_lost_fwd", + "ScaleUnit": "1per_sec" + }, { "BriefDescription": "Message Signaled Interrupts (MSI) per second = sent by the integrated I/O traffic controller (IIO) to System Configuration= Controller (Ubox)", "MetricExpr": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.UBOX_POSTED / duratio= n_time", @@ -294,6 +300,27 @@ "MetricName": "memory_bandwidth_write", "ScaleUnit": "1MB/s" }, + { + "BriefDescription": "All reads to the local sub-numa cluster cache= as a percentage of total memory read accesses", + "MetricExpr": "(L2_LINES_IN.ALL - (OCR.READS_TO_CORE.SNC_CACHE.HIT= M + OCR.READS_TO_CORE.SNC_CACHE.HIT_WITH_FWD + OCR.READS_TO_CORE.REMOTE_CAC= HE.SNOOP_FWD + OCR.READS_TO_CORE.REMOTE_MEMORY + OCR.READS_TO_CORE.L3_MISS_= LOCAL)) / L2_LINES_IN.ALL", + "MetricName": "numa_percent_all_reads_to_local_cluster_cache", + "PublicDescription": "All reads to the local sub-numa cluster cach= e as a percentage of total memory read accesses. Includes demand and prefet= ch requests for data reads, code reads, read for ownerships (RFO), does not= include LLC prefetches", + "ScaleUnit": "100%" + }, + { + "BriefDescription": "All reads to the local sub-numa cluster memor= y as a percentage of total memory read accesses", + "MetricExpr": "OCR.READS_TO_CORE.L3_MISS_LOCAL / L2_LINES_IN.ALL", + "MetricName": "numa_percent_all_reads_to_local_cluster_memory", + "PublicDescription": "All reads to the local sub-numa cluster memo= ry as a percentage of total memory read accesses. Includes demand and prefe= tch requests for data reads, code reads, read for ownerships (RFO), does no= t include LLC prefetches", + "ScaleUnit": "100%" + }, + { + "BriefDescription": "All reads to a remote sub-numa cluster cache = as a percentage of total memory read accesses", + "MetricExpr": "(OCR.READS_TO_CORE.SNC_CACHE.HIT_WITH_FWD + OCR.REA= DS_TO_CORE.SNC_CACHE.HITM) / L2_LINES_IN.ALL", + "MetricName": "numa_percent_all_reads_to_remote_cluster_cache", + "PublicDescription": "All reads to a remote sub-numa cluster cache= as a percentage of total memory read accesses. Includes demand and prefetc= h requests for data reads, code reads, read for ownerships (RFO), does not = include LLC prefetches", + "ScaleUnit": "100%" + }, { "BriefDescription": "Memory read that miss the last level cache (L= LC) addressed to local DRAM as a percentage of total memory read accesses, = does not include LLC prefetches", "MetricExpr": "(UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL + UNC_CHA_TO= R_INSERTS.IA_MISS_DRD_PREF_LOCAL) / (UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL = + UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL + UNC_CHA_TOR_INSERTS.IA_MISS_= DRD_REMOTE + UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE)", diff --git a/tools/perf/pmu-events/arch/x86/mapfile.csv b/tools/perf/pmu-ev= ents/arch/x86/mapfile.csv index b84035dc5b4f..96580ffda7bf 100644 --- a/tools/perf/pmu-events/arch/x86/mapfile.csv +++ b/tools/perf/pmu-events/arch/x86/mapfile.csv @@ -13,7 +13,7 @@ GenuineIntel-6-CF,v1.21,emeraldrapids,core GenuineIntel-6-5[CF],v13,goldmont,core GenuineIntel-6-7A,v1.01,goldmontplus,core GenuineIntel-6-B6,v1.11,grandridge,core -GenuineIntel-6-A[DE],v1.16,graniterapids,core +GenuineIntel-6-A[DE],v1.17,graniterapids,core GenuineIntel-6-(3C|45|46),v36,haswell,core GenuineIntel-6-3F,v29,haswellx,core GenuineIntel-6-7[DE],v1.24,icelake,core --=20 2.53.0.414.gf7e9f6c205-goog