From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EC52938F92E for ; Mon, 2 Mar 2026 09:59:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772445544; cv=none; b=S2Wq0Nm4CnmmFdM4eDNclsNNMsAlGlPS/xTtqWfAuKR2Vpy2bv/GBvyUQ+c3yCI7YNKib7QJwXkxygDk291/XmUhurcisXiUtdilV8dhrLyTFp55ZSP9ss1EobB4vPDwPvGAhaarIYB5uG4DGQEHEZ8K9yJmpjOD7UrnuK16gtQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772445544; c=relaxed/simple; bh=eRJWGojM49Ji/+2iZ0H6trQJMLyUoGk/ENbpTtxpdOE=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=ccEPAOEg+wfryv9quEvrJ5/AXpExTgAMZeAqv4zRi+UvOI4sa7ee8MEm3U9B+dQSnfV1z0sDEPfbhT/NpY81R5r3EIYqrrLow4Fhxswt5es3ztRBSVoVSiK0HLmrFUid72ds+rn7hFwqLsd16+2fAdo6pYDgQrEsO5WZfBusU6Y= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=TXpcLcxG; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="TXpcLcxG" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1772445541; x=1803981541; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=eRJWGojM49Ji/+2iZ0H6trQJMLyUoGk/ENbpTtxpdOE=; b=TXpcLcxG0nM7BnFm8Dq2PTABeZ9QeqIo4tUQf1+Ws3tAp9c/5YGPoSr2 CRV0DgwahHncfjlsVhUl+OEa7w3QNjKhcXXiTjJjz9DkpIZtw7lAw7wt4 8RwR9zGh2INDGTxIIuSI0K8vZXbkoovEoORL8261QvV048M7WNJDDj1EM UqYncNkzAWMpxFstjVxioveUIwZ3oHBC2t4gEx3zEivGB9cH0QmvCMfay zNSY3e1Zkp+Qcm+dGuZQ9InxcBkDtdocH3lVXCTVzZD16YtRXktwcLCPv lXQkUc84CWx246M2l/E/cH0IthNDfGMgPAEpLn+GVKn4rhaLq+TcUXMR6 w==; X-CSE-ConnectionGUID: AQ/YaWamTp2Mm6SLdM5jyw== X-CSE-MsgGUID: jNrQ85j3TyCQk85AOPmyvw== X-IronPort-AV: E=McAfee;i="6800,10657,11716"; a="96066039" X-IronPort-AV: E=Sophos;i="6.21,319,1763452800"; d="scan'208";a="96066039" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Mar 2026 01:58:52 -0800 X-CSE-ConnectionGUID: b0KjjVgESZWNnRQDWxqE2g== X-CSE-MsgGUID: WHxmzjh/TcCwcGTqJER82Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,319,1763452800"; d="scan'208";a="217628236" Received: from black.igk.intel.com ([10.91.253.5]) by orviesa008.jf.intel.com with ESMTP; 02 Mar 2026 01:58:51 -0800 Received: by black.igk.intel.com (Postfix, from userid 1003) id EE13C95; Mon, 02 Mar 2026 10:58:49 +0100 (CET) From: Andy Shevchenko To: Mark Brown , Andy Shevchenko , linux-kernel@vger.kernel.org, driver-core@lists.linux.dev Cc: Greg Kroah-Hartman , "Rafael J. Wysocki" , Danilo Krummrich Subject: [PATCH v4 0/3] regcache: Avoid accessing non-initialised cache Date: Mon, 2 Mar 2026 10:56:54 +0100 Message-ID: <20260302095847.2310066-1-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.50.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Refactor regcache flow that populates cache on initialisation phase based on the values in HW. This makes code robust against any possible accesses to not-fully initialised caches. Changelog v4: - made conditional against 'count' to make it less dependent to the previous code path v3: 20260226135918.381979-1-andriy.shevchenko@linux.intel.com Changelog v3: - dropped unneeded churn in patch 3 (Mark) - fixed code to pass kunit test cases (Mark) v2: 20260225161659.3811671-1-andriy.shevchenko@linux.intel.com Changelog v2: - rebased on top of the latest regmap changes (Mark) - added two more little cleanups (patches 4 & 5) Andy Shevchenko (3): regcache: Move HW readback after cache initialisation regcache: Define iterator inside for-loop and align their types regcache: Amend printf() specifiers when printing registers drivers/base/regmap/internal.h | 2 +- drivers/base/regmap/regcache.c | 42 ++++++++++++++++++++-------------- 2 files changed, 26 insertions(+), 18 deletions(-) -- 2.50.1