Re: [PATCH 1/2] watchdog: sama5d4_wdt: Fix WDDIS detection on SAM9X60 and SAMA7G5

Alexandre Belloni
2026-03-02T14:32:22Z

On 02/03/2026 17:03:09+0530, Balakrishnan Sambath wrote:
> The driver hardcoded AT91_WDT_WDDIS (bit 15) in wdt_enabled and the
> probe initial state readout. SAM9X60 and SAMA7G5 use bit 12
> (AT91_SAM9X60_WDDIS), causing incorrect WDDIS detection.
>
> Introduce a per-device wddis_mask field to select the correct WDDIS
> bit based on the compatible string.
>
> Fixes: 266da53c35fc ("watchdog: sama5d4: readout initial state")
> Co-developed-by: Andrei Simion <andrei.simion@microchip.com>
> Signed-off-by: Andrei Simion <andrei.simion@microchip.com>
> Signed-off-by: Balakrishnan Sambath <balakrishnan.s@microchip.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

> ---
> drivers/watchdog/sama5d4_wdt.c | 48 +++++++++++++++-------------------
> 1 file changed, 21 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/watchdog/sama5d4_wdt.c b/drivers/watchdog/sama5d4_wdt.c
> index 13e72918338a..704b786cc2ec 100644
> --- a/drivers/watchdog/sama5d4_wdt.c
> +++ b/drivers/watchdog/sama5d4_wdt.c
> @@ -24,37 +24,41 @@
> #define WDT_DEFAULT_TIMEOUT MAX_WDT_TIMEOUT
>
> #define WDT_SEC2TICKS(s) ((s) ? (((s) << 8) - 1) : 0)
>
> struct sama5d4_wdt {
> struct watchdog_device wdd;
> void __iomem *reg_base;
> u32 mr;
> u32 ir;
> + u32 wddis_mask;
> unsigned long last_ping;
> bool need_irq;
> bool sam9x60_support;
> };
>
> static int wdt_timeout;
> static bool nowayout = WATCHDOG_NOWAYOUT;
>
> module_param(wdt_timeout, int, 0);
> MODULE_PARM_DESC(wdt_timeout,
> "Watchdog timeout in seconds. (default = "
> __MODULE_STRING(WDT_DEFAULT_TIMEOUT) ")");
>
> module_param(nowayout, bool, 0);
> MODULE_PARM_DESC(nowayout,
> "Watchdog cannot be stopped once started (default="
> __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
>
> -#define wdt_enabled (!(wdt->mr & AT91_WDT_WDDIS))
> +static inline bool wdt_enabled(struct sama5d4_wdt *wdt)
> +{
> + return !(wdt->mr & wdt->wddis_mask);
> +}
>
> #define wdt_read(wdt, field) \
> readl_relaxed((wdt)->reg_base + (field))
>
> /* 4 slow clock periods is 4/32768 = 122.07µs*/
> #define WDT_DELAY usecs_to_jiffies(123)
>
> static void wdt_write(struct sama5d4_wdt *wdt, u32 field, u32 val)
> {
> @@ -75,55 +79,49 @@ static void wdt_write_nosleep(struct sama5d4_wdt *wdt, u32 field, u32 val)
> udelay(123);
> writel_relaxed(val, wdt->reg_base + field);
> wdt->last_ping = jiffies;
> }
>
> static int sama5d4_wdt_start(struct watchdog_device *wdd)
> {
> struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
>
> - if (wdt->sam9x60_support) {
> + if (wdt->sam9x60_support)
> writel_relaxed(wdt->ir, wdt->reg_base + AT91_SAM9X60_IER);
> - wdt->mr &= ~AT91_SAM9X60_WDDIS;
> - } else {
> - wdt->mr &= ~AT91_WDT_WDDIS;
> - }
> + wdt->mr &= ~wdt->wddis_mask;
> wdt_write(wdt, AT91_WDT_MR, wdt->mr);
>
> return 0;
> }
>
> static int sama5d4_wdt_stop(struct watchdog_device *wdd)
> {
> struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
>
> - if (wdt->sam9x60_support) {
> + if (wdt->sam9x60_support)
> writel_relaxed(wdt->ir, wdt->reg_base + AT91_SAM9X60_IDR);
> - wdt->mr |= AT91_SAM9X60_WDDIS;
> - } else {
> - wdt->mr |= AT91_WDT_WDDIS;
> - }
> + wdt->mr |= wdt->wddis_mask;
> wdt_write(wdt, AT91_WDT_MR, wdt->mr);
>
> return 0;
> }
>
> static int sama5d4_wdt_ping(struct watchdog_device *wdd)
> {
> struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
>
> wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
>
> return 0;
> }
>
> static int sama5d4_wdt_set_timeout(struct watchdog_device *wdd,
> - unsigned int timeout)
> + unsigned int timeout)
> {
> struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
> u32 value = WDT_SEC2TICKS(timeout);
>
> if (wdt->sam9x60_support) {
> wdt_write(wdt, AT91_SAM9X60_WLR,
> AT91_SAM9X60_SET_COUNTER(value));
>
> wdd->timeout = timeout;
> @@ -134,20 +132,20 @@ static int sama5d4_wdt_set_timeout(struct watchdog_device *wdd,
> wdt->mr |= AT91_WDT_SET_WDV(value);
>
> /*
> * WDDIS has to be 0 when updating WDD/WDV. The datasheet states: When
> * setting the WDDIS bit, and while it is set, the fields WDV and WDD
> * must not be modified.
> * If the watchdog is enabled, then the timeout can be updated. Else,
> * wait that the user enables it.
> */
> - if (wdt_enabled)
> - wdt_write(wdt, AT91_WDT_MR, wdt->mr & ~AT91_WDT_WDDIS);
> + if (wdt_enabled(wdt))
> + wdt_write(wdt, AT91_WDT_MR, wdt->mr & ~wdt->wddis_mask);
>
> wdd->timeout = timeout;
>
> return 0;
> }
>
> static const struct watchdog_info sama5d4_wdt_info = {
> .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
> .identity = "Atmel SAMA5D4 Watchdog",
> @@ -178,22 +176,19 @@ static irqreturn_t sama5d4_wdt_irq_handler(int irq, void *dev_id)
> }
>
> return IRQ_HANDLED;
> }
>
> static int of_sama5d4_wdt_init(struct device_node *np, struct sama5d4_wdt *wdt)
> {
> const char *tmp;
>
> - if (wdt->sam9x60_support)
> - wdt->mr = AT91_SAM9X60_WDDIS;
> - else
> - wdt->mr = AT91_WDT_WDDIS;
> + wdt->mr = wdt->wddis_mask;
>
> if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) &&
> !strcmp(tmp, "software"))
> wdt->need_irq = true;
>
> if (of_property_read_bool(np, "atmel,idle-halt"))
> wdt->mr |= AT91_WDT_WDIDLEHLT;
>
> if (of_property_read_bool(np, "atmel,dbg-halt"))
> @@ -207,27 +202,23 @@ static int sama5d4_wdt_init(struct sama5d4_wdt *wdt)
> u32 reg, val;
>
> val = WDT_SEC2TICKS(WDT_DEFAULT_TIMEOUT);
> /*
> * When booting and resuming, the bootloader may have changed the
> * watchdog configuration.
> * If the watchdog is already running, we can safely update it.
> * Else, we have to disable it properly.
> */
> - if (!wdt_enabled) {
> + if (!wdt_enabled(wdt)) {
> reg = wdt_read(wdt, AT91_WDT_MR);
> - if (wdt->sam9x60_support && (!(reg & AT91_SAM9X60_WDDIS)))
> - wdt_write_nosleep(wdt, AT91_WDT_MR,
> - reg | AT91_SAM9X60_WDDIS);
> - else if (!wdt->sam9x60_support &&
> - (!(reg & AT91_WDT_WDDIS)))
> + if (!(reg & wdt->wddis_mask))
> wdt_write_nosleep(wdt, AT91_WDT_MR,
> - reg | AT91_WDT_WDDIS);
> + reg | wdt->wddis_mask);
> }
>
> if (wdt->sam9x60_support) {
> if (wdt->need_irq)
> wdt->ir = AT91_SAM9X60_PERINT;
> else
> wdt->mr |= AT91_SAM9X60_PERIODRST;
>
> wdt_write(wdt, AT91_SAM9X60_IER, wdt->ir);
> @@ -267,18 +258,21 @@ static int sama5d4_wdt_probe(struct platform_device *pdev)
> wdd->ops = &sama5d4_wdt_ops;
> wdd->min_timeout = MIN_WDT_TIMEOUT;
> wdd->max_timeout = MAX_WDT_TIMEOUT;
> wdt->last_ping = jiffies;
>
> if (of_device_is_compatible(dev->of_node, "microchip,sam9x60-wdt") ||
> of_device_is_compatible(dev->of_node, "microchip,sama7g5-wdt"))
> wdt->sam9x60_support = true;
>
> + wdt->wddis_mask = wdt->sam9x60_support ? AT91_SAM9X60_WDDIS
> + : AT91_WDT_WDDIS;
> +
> watchdog_set_drvdata(wdd, wdt);
>
> regs = devm_platform_ioremap_resource(pdev, 0);
> if (IS_ERR(regs))
> return PTR_ERR(regs);
>
> wdt->reg_base = regs;
>
> ret = of_sama5d4_wdt_init(dev->of_node, wdt);
> @@ -300,20 +294,20 @@ static int sama5d4_wdt_probe(struct platform_device *pdev)
> if (ret) {
> dev_err(dev, "cannot register interrupt handler\n");
> return ret;
> }
> }
>
> watchdog_init_timeout(wdd, wdt_timeout, dev);
>
> reg = wdt_read(wdt, AT91_WDT_MR);
> - if (!(reg & AT91_WDT_WDDIS)) {
> - wdt->mr &= ~AT91_WDT_WDDIS;
> + if (!(reg & wdt->wddis_mask)) {
> + wdt->mr &= ~wdt->wddis_mask;
> set_bit(WDOG_HW_RUNNING, &wdd->status);
> }
>
> ret = sama5d4_wdt_init(wdt);
> if (ret)
> return ret;
>
> watchdog_set_nowayout(wdd, nowayout);
>
> --
> 2.34.1
>

--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering