From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 853031DE8BB for ; Tue, 3 Mar 2026 13:34:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.13 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772544888; cv=none; b=FZDoZtt7FokdAMGlDvu1FYqhACVuaoHsc2tASdUU5D3nux6jAvWKUJGHj2I7pD7cNK9lDEixiHc9P+AIam4EGAh9HVhdp1FxgXOWVeDCoTNboEmWpVwPBgvQ6WoE6VjIr2oB3XzSI4hzKBPoFEeYEoySuZZplrWkjQPUQddZiBA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772544888; c=relaxed/simple; bh=1GaiZTuDfVhGhx6tbOxiTmG3pWXdz7+ENfgkY3MPElM=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version:Content-Type; b=Gfr3x93e2sOMc8/I7KQAwHop/buOMwfDHq1k4jagv2vb0NE/DrWf6LhSKFhG/S7qIJkdJnoIIBwE60IPlfiYjAK4NArfRCUBC2ft7YJlYVAUYmfrT+e1f4B2ZlYQmEaphGlnANQ9gGJr7Vxe9THR9JfLMWRRL4sVaWRgRLEVNVQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=YquFZVJk; arc=none smtp.client-ip=192.198.163.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="YquFZVJk" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1772544886; x=1804080886; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=1GaiZTuDfVhGhx6tbOxiTmG3pWXdz7+ENfgkY3MPElM=; b=YquFZVJktV+9pOx9ZGKg/Wnv5a9/wl9tx+uGGPQr4iBSEHWwaZwgfn1k 4M7O1Kq1CT8Ma+W20vohBsiGQ1n5WuPp0oduYjyTa2gc41sBTWyPAq8DA DTdizmdn/WeZQdzY7cs95iBeO1l0izpisbDYD+CpW+SklBoHkEuyp+r6k BNrRlOOXcWUiIcQtNdWABS67zXhZGA0Q0Gmn+b03SIRtG9Sqpwze+4IVj dWJ92G/v4w2WN7IJSys9Lw72jVrOY2XPjuUc+ask8IIXSQTVlJIeVJ+zl zqVxcHuP1WD6GpI21BPPa3JmaOuslx7J59NpsQ1XUULRMpHK8v/cZI8NH w==; X-CSE-ConnectionGUID: uXmN/v9EQX2Pe522XBt03w== X-CSE-MsgGUID: NHG2o/D6Q4qDuk1z0apMIw== X-IronPort-AV: E=McAfee;i="6800,10657,11718"; a="76179720" X-IronPort-AV: E=Sophos;i="6.21,322,1763452800"; d="scan'208";a="76179720" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Mar 2026 05:34:43 -0800 X-CSE-ConnectionGUID: HGe6hFJdSSOzeCRHBtNHNA== X-CSE-MsgGUID: PxND/fVURbyfhiOrm2gSog== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,322,1763452800"; d="scan'208";a="217947861" Received: from smoticic-mobl1.ger.corp.intel.com (HELO fedora) ([10.245.244.243]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Mar 2026 05:34:38 -0800 From: =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= To: intel-xe@lists.freedesktop.org Cc: =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Matthew Brost , Jason Gunthorpe , Andrew Morton , Simona Vetter , Dave Airlie , Alistair Popple , dri-devel@lists.freedesktop.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org, =?UTF-8?q?Christian=20K=C3=B6nig?= Subject: [PATCH v3 0/4] Two-pass MMU interval notifiers Date: Tue, 3 Mar 2026 14:34:05 +0100 Message-ID: <20260303133409.11609-1-thomas.hellstrom@linux.intel.com> X-Mailer: git-send-email 2.53.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit GPU use-cases for mmu_interval_notifiers with hmm often involve starting a gpu operation and then waiting for it to complete. These operations are typically context preemption or TLB flushing. With single-pass notifiers per GPU this doesn't scale in multi-gpu scenarios. In those scenarios we'd want to first start preemption- or TLB flushing on all GPUs and as a second pass wait for them to complete. This also applies in non-recoverable page-fault scenarios to starting a preemption requests on GPUs and waiting for the GPUs to preempt so that system pages they access can be reclaimed. One can do this on per-driver basis multiplexing per-driver notifiers but that would mean sharing the notifier "user" lock across all GPUs and that doesn't scale well either, so adding support for two-pass in the core appears like the right choice. So this series does that, with pach 1 implementing the core support and also describes the choices made. The rest of the patches implements a POC with xeKMD userptr invalidation and potential TLB-flushing. A follow-up series will extend to drm_gpusvm. v2 hightlights: - Refactor the core mm patch to use the struct mmu_interval_notifier_ops for the invalidate_finish() callback. - Rebase on xe driver tlb invalidation changes. - Provide an initial implementation for userptr instead of drm_gpusvm. The intent is to handle drm_gpusvm in a follow-up series. v3: - Address review comments from Matt Brost: Code formatting, documentation, additional asserts and removal of unnecessary waits, as specified in each patch. Cc: Matthew Brost Cc: Jason Gunthorpe Cc: Andrew Morton Cc: Simona Vetter Cc: Dave Airlie Cc: Alistair Popple Cc: Cc: Cc: Thomas Hellström (4): mm/mmu_notifier: Allow two-pass struct mmu_interval_notifiers drm/xe/userptr: Convert invalidation to two-pass MMU notifier drm/xe: Split TLB invalidation into submit and wait steps drm/xe/userptr: Defer Waiting for TLB invalidation to the second pass if possible drivers/gpu/drm/xe/xe_svm.c | 8 +- drivers/gpu/drm/xe/xe_tlb_inval.c | 84 +++++++++++++ drivers/gpu/drm/xe/xe_tlb_inval.h | 6 + drivers/gpu/drm/xe/xe_tlb_inval_types.h | 14 +++ drivers/gpu/drm/xe/xe_userptr.c | 155 ++++++++++++++++++++---- drivers/gpu/drm/xe/xe_userptr.h | 31 ++++- drivers/gpu/drm/xe/xe_vm.c | 99 +++++---------- drivers/gpu/drm/xe/xe_vm.h | 5 +- drivers/gpu/drm/xe/xe_vm_madvise.c | 10 +- drivers/gpu/drm/xe/xe_vm_types.h | 1 + include/linux/mmu_notifier.h | 38 ++++++ mm/mmu_notifier.c | 65 ++++++++-- 12 files changed, 412 insertions(+), 104 deletions(-) -- 2.53.0