From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7DE3836C9E2 for ; Tue, 3 Mar 2026 17:38:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772559495; cv=none; b=bvuVhvy9npHG2Vq5guUmr7gcJDnRYq1gNlVibkD3K5E+JNzThoRHFBrJ+/Xah1naihZBLIt12tmh9mF6fSakm4hfa9wdkP8AT06XFlEAaWEtgqNIWgdsVniw/7WGtpmVA8+nURfiC7Enr2YBfEGan6jgbju8NFCUX6zHFE420bg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772559495; c=relaxed/simple; bh=1Nde7e5uHTsR2x6eebagDXgI1S8zAZOGYJewGR8CYiA=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=HDT5mQSJTE2wFthyvtCXtxkVKqjWaGX0ZKGkwxecIrAq3nimjc6QZKvi8Q6l8j3ZqheLLk/PLHTVN+tWj7DhaxrseWaoQPRSPspvV97+ISoji2YEnkn6urO081Qv8lZt7QL0PQmYCt2x1Tv10FW5GpB5b7J7Uszj51iW/8rxupQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ulMJouSB; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ulMJouSB" Received: by smtp.kernel.org (Postfix) with ESMTPSA id EB6D8C116C6; Tue, 3 Mar 2026 17:38:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772559495; bh=1Nde7e5uHTsR2x6eebagDXgI1S8zAZOGYJewGR8CYiA=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=ulMJouSBed7MfjDM8t2LkSINWmQcJ8nFRs5tAdEjuGerYUAe7+z/n6Jv1p6lsPyUZ bOe7Y0m405bpTIyotez/BjPmTrTKujRKXcJGxDWUugs1fqUdALZLZbDISrc91Dty6t yQlXh5KJyIMIT3Xc6sIPDEsBZB5au2Er6ApY1hUYNAUNO8CrrleFxEo67gch4WoZ95 dH2pikPvVHmULEXNXmxLfA4CHKfmJP+aBP44iR++jwYkB+qNulj+rfvIYfkKuSC5W+ p5ZdQY0Aez4C0qaqnSGmBIcVSxYkUik7eYB3ZKZoWpxZfhI4RKTAfEqU1WsEV5Z/xU kWhDKYbtOKSkA== Date: Tue, 3 Mar 2026 10:38:09 -0700 From: Nathan Chancellor To: Thomas Gleixner Cc: LKML , Anna-Maria Behnsen , John Stultz , Stephen Boyd , Daniel Lezcano , Juri Lelli , Vincent Guittot , Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , x86@kernel.org, Peter Zijlstra , Frederic Weisbecker , Eric Dumazet Subject: Re: [patch 20/48] x86/apic: Enable TSC coupled programming mode Message-ID: <20260303173809.GA1114907@ax162> References: <20260224163022.795809588@kernel.org> <20260224163430.076565985@kernel.org> <20260303012905.GA978396@ax162> <87jyvtyo6o.ffs@tglx> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <87jyvtyo6o.ffs@tglx> On Tue, Mar 03, 2026 at 03:37:03PM +0100, Thomas Gleixner wrote: > On Mon, Mar 02 2026 at 18:29, Nathan Chancellor wrote: > > > > After this change landed in -next as commit f246ec3478cf ("x86/apic: > > Enable TSC coupled programming mode"), two of my Intel-based test > > machines fail to boot. Unfortunately, I do not think I have any serial > > access on these, so I have little introspective ability. Is there any > > information I can provide or patches I can test to try and help figure > > out what is going on here? I have attached the output of lscpu of both > > machines, in case there is some common thread there. > > Grmbl. I stared at it for a while and I have a suspicion. Can you try > the patch below and also provide from one of the machines the output of > > dmesg | grep -i tsc This patch works on both machines, so your suspicion seemed spot on. Output of that dmesg commmand appears to be the same between 89f951a1e8ad and f246ec3478cf with that diff applied: [ 0.000000] tsc: Detected 2500.000 MHz processor [ 0.000000] tsc: Detected 2496.000 MHz TSC [ 0.008989] TSC deadline timer available [ 0.119139] clocksource: tsc-early: mask: 0xffffffffffffffff max_cycles: 0x23fa772cf26, max_idle_ns: 440795269835 ns [ 0.312141] clocksource: Switched to clocksource tsc-early [ 0.322686] clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0x23fa772cf26, max_idle_ns: 440795269835 ns [ 0.322951] clocksource: Switched to clocksource tsc If there is anything else I can provide, let me know. If it becomes a formal patch: Tested-by: Nathan Chancellor > --- > --- a/kernel/time/timekeeping.c > +++ b/kernel/time/timekeeping.c > @@ -404,6 +404,7 @@ static void tk_setup_internals(struct ti > */ > clocks_calc_mult_shift(&tk->cs_ns_to_cyc_mult, &tk->cs_ns_to_cyc_shift, > NSEC_PER_MSEC, clock->freq_khz, 3600 * 1000); > + tk->cs_ns_to_cyc_maxns = div_u64(clock->mask, tk->cs_ns_to_cyc_mult); > } > } >