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[82.69.66.36]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4851fb3668csm248370765e9.13.2026.03.06.15.03.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Mar 2026 15:03:56 -0800 (PST) Date: Fri, 6 Mar 2026 23:03:55 +0000 From: David Laight To: Waiman Long , Peter Zijlstra , Ingo Molnar , Will Deacon , Boqun Feng , linux-kernel@vger.kernel.org, Linus Torvalds , Yafang Shao , Steven Rostedt Subject: Re: [PATCH v3 next 4/5] Optimise decode_cpu() and per_cpu_ptr() Message-ID: <20260306230355.6124cae4@pumpkin> In-Reply-To: <20260306225150.93178-5-david.laight.linux@gmail.com> References: <20260306225150.93178-1-david.laight.linux@gmail.com> <20260306225150.93178-5-david.laight.linux@gmail.com> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; arm-unknown-linux-gnueabihf) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Fri, 6 Mar 2026 22:51:49 +0000 david.laight.linux@gmail.com wrote: > From: David Laight > > Changing the 'cpu number' variables to 'unsigned int' generates > slightly better code (and the values can never be negative). > > More specifically gcc knows that decrementing the 'encoded' value > zeros the high 32bits (on sane 64bit architectures) so that it doesn't > need to zero/sign extend the value to index __per_cpu_offset[]. > > Not massive but saves two instructions. > > Signed-off-by: David Laight > --- > > Proposed by Linus. > Part of a discussion from v1 about whether removing the offset would help. > > kernel/locking/osq_lock.c | 18 +++++++++--------- > 1 file changed, 9 insertions(+), 9 deletions(-) > > diff --git a/kernel/locking/osq_lock.c b/kernel/locking/osq_lock.c > index 5dd7e08d4fda..0619691e2756 100644 > --- a/kernel/locking/osq_lock.c > +++ b/kernel/locking/osq_lock.c > @@ -15,7 +15,7 @@ > struct optimistic_spin_node { > struct optimistic_spin_node *next; > int locked; /* 1 if lock acquired */ > - int prev_cpu; /* encoded CPU # + 1 value */ > + unsigned int prev_cpu; /* encoded CPU # + 1 value */ > }; > > static DEFINE_PER_CPU_SHARED_ALIGNED(struct optimistic_spin_node, osq_node); > @@ -24,19 +24,19 @@ static DEFINE_PER_CPU_SHARED_ALIGNED(struct optimistic_spin_node, osq_node); > * We use the value 0 to represent "no CPU", thus the encoded value > * will be the CPU number incremented by 1. > */ > -static inline int encode_cpu(int cpu_nr) > +static inline unsigned int encode_cpu(unsigned int cpu_nr) > { > return cpu_nr + 1; > } > > -static inline int prev_cpu_nr(struct optimistic_spin_node *node) > +static inline unsigned int prev_cpu_nr(struct optimistic_spin_node *node) > { > return READ_ONCE(node->prev_cpu) - 1; > } > > -static inline struct optimistic_spin_node *decode_cpu(int encoded_cpu_val) > +static inline struct optimistic_spin_node *decode_cpu(unsigned int encoded_cpu_val) > { > - int cpu_nr = encoded_cpu_val - 1; > + unsigned int cpu_nr = encoded_cpu_val - 1; > > return per_cpu_ptr(&osq_node, cpu_nr); > } > @@ -53,9 +53,9 @@ static inline struct optimistic_spin_node *decode_cpu(int encoded_cpu_val) > static inline struct optimistic_spin_node * > osq_wait_next(struct optimistic_spin_queue *lock, > struct optimistic_spin_node *node, > - int old_cpu) > + unsigned int old_cpu) > { > - int curr = encode_cpu(smp_processor_id()); > + unsigned int curr = encode_cpu(smp_processor_id()); > > for (;;) { > if (atomic_read(&lock->tail) == curr && > @@ -94,8 +94,8 @@ bool osq_lock(struct optimistic_spin_queue *lock) > { > struct optimistic_spin_node *node = this_cpu_ptr(&osq_node); > struct optimistic_spin_node *prev, *next; > - int curr = encode_cpu(smp_processor_id()); > - int prev_cpu; > + unsigned int curr = encode_cpu(smp_processor_id()); > + unsigned int prev_cpu; > > node->next = NULL; >