drivers/media/platform/synopsys/dw-mipi-csi2rx.c:240:undefined reference to `phy_mipi_dphy_get_default_config_for_hsclk'

[kernel test robot <lkp@intel.com>]

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head:   fc9f248d8c591454e257edd54ac4085d84f11e6a
commit: 355a110040665e439af126e8ec9c3968e73f163c media: synopsys: add driver for the designware mipi csi-2 receiver
date:   7 weeks ago
config: x86_64-randconfig-073-20260309 (https://download.01.org/0day-ci/archive/20260309/202603090827.nPbHOnKI-lkp@intel.com/config)
compiler: gcc-14 (Debian 14.2.0-19) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260309/202603090827.nPbHOnKI-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202603090827.nPbHOnKI-lkp@intel.com/

All errors (new ones prefixed by >>):

   ld: drivers/media/platform/synopsys/dw-mipi-csi2rx.o: in function `dw_mipi_csi2rx_start':
>> drivers/media/platform/synopsys/dw-mipi-csi2rx.c:240:(.text+0x5af): undefined reference to `phy_mipi_dphy_get_default_config_for_hsclk'


vim +240 drivers/media/platform/synopsys/dw-mipi-csi2rx.c

   215	
   216	static int dw_mipi_csi2rx_start(struct dw_mipi_csi2rx_device *csi2)
   217	{
   218		struct media_pad *source_pad;
   219		union phy_configure_opts opts;
   220		u32 lanes = csi2->lanes_num;
   221		u32 control = 0;
   222		s64 link_freq;
   223		int ret;
   224	
   225		if (lanes < 1 || lanes > 4)
   226			return -EINVAL;
   227	
   228		source_pad = media_pad_remote_pad_unique(
   229			&csi2->pads[DW_MIPI_CSI2RX_PAD_SINK]);
   230		if (IS_ERR(source_pad))
   231			return PTR_ERR(source_pad);
   232	
   233		/* set mult and div to 0, thus completely rely on V4L2_CID_LINK_FREQ */
   234		link_freq = v4l2_get_link_freq(source_pad, 0, 0);
   235		if (link_freq < 0)
   236			return link_freq;
   237	
   238		switch (csi2->bus_type) {
   239		case V4L2_MBUS_CSI2_DPHY:
 > 240			ret = phy_mipi_dphy_get_default_config_for_hsclk(link_freq * 2,
   241									 lanes, &opts.mipi_dphy);
   242			if (ret)
   243				return ret;
   244	
   245			ret = phy_set_mode(csi2->phy, PHY_MODE_MIPI_DPHY);
   246			if (ret)
   247				return ret;
   248	
   249			ret = phy_configure(csi2->phy, &opts);
   250			if (ret)
   251				return ret;
   252	
   253			control |= SW_CPHY_EN(0);
   254			break;
   255	
   256		case V4L2_MBUS_CSI2_CPHY:
   257			/* TODO: implement CPHY configuration */
   258			return -EOPNOTSUPP;
   259		default:
   260			return -EINVAL;
   261		}
   262	
   263		control |= SW_DATATYPE_FS(0x00) | SW_DATATYPE_FE(0x01) |
   264			   SW_DATATYPE_LS(0x02) | SW_DATATYPE_LE(0x03);
   265	
   266		dw_mipi_csi2rx_write(csi2, DW_MIPI_CSI2RX_N_LANES, lanes - 1);
   267		dw_mipi_csi2rx_write(csi2, DW_MIPI_CSI2RX_CONTROL, control);
   268		dw_mipi_csi2rx_write(csi2, DW_MIPI_CSI2RX_RESETN, 1);
   269	
   270		return phy_power_on(csi2->phy);
   271	}
   272	

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