[PATCH v2 0/7] riscv: spacemit: enable SD card support with UHS modes for OrangePi RV2

[PATCH v2 0/7] riscv: spacemit: enable SD card support with UHS modes for OrangePi RV2

[Iker Pedrosa]

This series enables complete SD card support for the Spacemit K1-based
OrangePi RV2 board, including UHS (Ultra High Speed) modes for
high-performance SD card operation.

Background

The Spacemit K1 SoC includes an SDHCI controller capable of supporting
SD cards up to UHS-I speeds (SDR104 at 208MHz). However, mainline
currently lacks basic SD controller configuration, SDHCI driver
enhancements for voltage switching and tuning, and power management
infrastructure.

Implementation

The series enables SD card support through coordinated layers:

- Hardware infrastructure (patches 1-2): Device tree bindings for voltage
switching hardware and essential clock infrastructure.
- SDHCI driver enhancements (patches 3-7): Regulator framework
integration, pinctrl state switching for voltage domains, AIB register
programming, and comprehensive SDR tuning support for reliable UHS
operation.
- SoC and board integration (patches 8-10): Complete K1 SoC controller
definitions, PMIC power infrastructure, and OrangePi RV2 board enablement
with full UHS support.

This transforms the OrangePi RV2 from having no SD card support to full
UHS-I capability, enabling high-performance storage up to 208MHz.

Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
---
Changes in v2:
- Removed custom AIB voltage switching code per maintainer feedback. The
  existing pinctrl driver already handles AIB voltage switching
  automatically via power-source property changes during UHS mode
  transitions. This eliminates code duplication.
- Squashed regulator and pinctrl commits into single voltage switching
  implementation.
- Moved voltage switching callback from dynamic probe assignment to
  static sdhci_ops declaration. Removed redundant SDHCI core call since
  the framework handles standard voltage switching automatically.
- Made clock override (SDHC_OVRRD_CLK_OEN | SDHC_FORCE_CLK_ON)
  conditional for SD/SDIO cards only. This follows vendor driver pattern
  of differentiating SD and eMMC card handling.
- Include no-mmc property for SD card.
- Link to v1: https://lore.kernel.org/r/20260302-orangepi-sd-card-uhs-v1-0-89c219973c0c@gmail.com

---
Iker Pedrosa (7):
      mmc: sdhci-of-k1: enable essential clock infrastructure for SD operation
      mmc: sdhci-of-k1: add regulator and pinctrl voltage switching support
      mmc: sdhci-of-k1: add SDR tuning infrastructure
      mmc: sdhci-of-k1: add comprehensive SDR tuning support
      riscv: dts: spacemit: k1: add SD card controller and pinctrl support
      riscv: dts: spacemit: k1-orangepi-rv2: add PMIC and power infrastructure
      riscv: dts: spacemit: k1-orangepi-rv2: add SD card support with UHS modes

 arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts |  67 ++++++
 arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi     |  40 ++++
 arch/riscv/boot/dts/spacemit/k1.dtsi             |  13 ++
 drivers/mmc/host/sdhci-of-k1.c                   | 252 +++++++++++++++++++++++
 4 files changed, 372 insertions(+)
---
base-commit: ec1fb4e55df47ed043ab2ccc6787e39b9d67e49b
change-id: 20260226-orangepi-sd-card-uhs-0ecb05839b0c

Best regards,
-- 
Iker Pedrosa <ikerpedrosam@gmail.com>

[PATCH v2 1/7] mmc: sdhci-of-k1: enable essential clock infrastructure for SD operation

[Iker Pedrosa]

Ensure SD card pins receive clock signals by enabling pad clock
generation and overriding automatic clock gating. Required for all SD
operation modes.

Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
---
 drivers/mmc/host/sdhci-of-k1.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/mmc/host/sdhci-of-k1.c b/drivers/mmc/host/sdhci-of-k1.c
index 0cc97e23a2f9c7b2f9376318a8a7ebb860571504..585c7eca6ebf253aac466dd37cef029deb63f692 100644
--- a/drivers/mmc/host/sdhci-of-k1.c
+++ b/drivers/mmc/host/sdhci-of-k1.c
@@ -20,6 +20,13 @@
 #include "sdhci.h"
 #include "sdhci-pltfm.h"
 
+#define SPACEMIT_SDHC_OP_EXT_REG	0x108
+#define  SDHC_OVRRD_CLK_OEN		BIT(11)
+#define  SDHC_FORCE_CLK_ON		BIT(12)
+
+#define SPACEMIT_SDHC_LEGACY_CTRL_REG	0x10C
+#define  SDHC_GEN_PAD_CLK_ON		BIT(6)
+
 #define SPACEMIT_SDHC_MMC_CTRL_REG	0x114
 #define  SDHC_MISC_INT_EN		BIT(1)
 #define  SDHC_MISC_INT			BIT(2)
@@ -100,6 +107,12 @@ static void spacemit_sdhci_reset(struct sdhci_host *host, u8 mask)
 
 	if (!(host->mmc->caps2 & MMC_CAP2_NO_MMC))
 		spacemit_sdhci_setbits(host, SDHC_MMC_CARD_MODE, SPACEMIT_SDHC_MMC_CTRL_REG);
+
+	spacemit_sdhci_setbits(host, SDHC_GEN_PAD_CLK_ON, SPACEMIT_SDHC_LEGACY_CTRL_REG);
+
+	if (host->mmc->caps2 & MMC_CAP2_NO_MMC)
+		spacemit_sdhci_setbits(host, SDHC_OVRRD_CLK_OEN | SDHC_FORCE_CLK_ON,
+				       SPACEMIT_SDHC_OP_EXT_REG);
 }
 
 static void spacemit_sdhci_set_uhs_signaling(struct sdhci_host *host, unsigned int timing)

-- 
2.53.0

Re: [PATCH v2 1/7] mmc: sdhci-of-k1: enable essential clock infrastructure for SD operation

[Adrian Hunter]

On 09/03/2026 13:40, Iker Pedrosa wrote:
> Ensure SD card pins receive clock signals by enabling pad clock
> generation and overriding automatic clock gating. Required for all SD
> operation modes.

Need to say why update to "SPACEMIT_SDHC_LEGACY_CTRL_REG" is Ok for
non-SD

> 
> Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
> ---
>  drivers/mmc/host/sdhci-of-k1.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci-of-k1.c b/drivers/mmc/host/sdhci-of-k1.c
> index 0cc97e23a2f9c7b2f9376318a8a7ebb860571504..585c7eca6ebf253aac466dd37cef029deb63f692 100644
> --- a/drivers/mmc/host/sdhci-of-k1.c
> +++ b/drivers/mmc/host/sdhci-of-k1.c
> @@ -20,6 +20,13 @@
>  #include "sdhci.h"
>  #include "sdhci-pltfm.h"
>  
> +#define SPACEMIT_SDHC_OP_EXT_REG	0x108
> +#define  SDHC_OVRRD_CLK_OEN		BIT(11)
> +#define  SDHC_FORCE_CLK_ON		BIT(12)
> +
> +#define SPACEMIT_SDHC_LEGACY_CTRL_REG	0x10C
> +#define  SDHC_GEN_PAD_CLK_ON		BIT(6)
> +
>  #define SPACEMIT_SDHC_MMC_CTRL_REG	0x114
>  #define  SDHC_MISC_INT_EN		BIT(1)
>  #define  SDHC_MISC_INT			BIT(2)
> @@ -100,6 +107,12 @@ static void spacemit_sdhci_reset(struct sdhci_host *host, u8 mask)
>  
>  	if (!(host->mmc->caps2 & MMC_CAP2_NO_MMC))
>  		spacemit_sdhci_setbits(host, SDHC_MMC_CARD_MODE, SPACEMIT_SDHC_MMC_CTRL_REG);
> +
> +	spacemit_sdhci_setbits(host, SDHC_GEN_PAD_CLK_ON, SPACEMIT_SDHC_LEGACY_CTRL_REG);
> +
> +	if (host->mmc->caps2 & MMC_CAP2_NO_MMC)
> +		spacemit_sdhci_setbits(host, SDHC_OVRRD_CLK_OEN | SDHC_FORCE_CLK_ON,
> +				       SPACEMIT_SDHC_OP_EXT_REG);
>  }
>  
>  static void spacemit_sdhci_set_uhs_signaling(struct sdhci_host *host, unsigned int timing)
> 

Re: [PATCH v2 1/7] mmc: sdhci-of-k1: enable essential clock infrastructure for SD operation

[Iker Pedrosa]

El vie, 13 mar 2026 a las 14:04, Adrian Hunter
(<adrian.hunter@intel.com>) escribió:
>
> On 09/03/2026 13:40, Iker Pedrosa wrote:
> > Ensure SD card pins receive clock signals by enabling pad clock
> > generation and overriding automatic clock gating. Required for all SD
> > operation modes.
>
> Need to say why update to "SPACEMIT_SDHC_LEGACY_CTRL_REG" is Ok for
> non-SD

After analyzing the reference driver implementation[1], the
SDHC_LEGACY_CTRL_REG setting is applied to both eMMC and SD
controllers.

The reference driver sets GEN_PAD_CLK_ON for any controller with
MMC_CAP2_NO_SDIO set (SDIO disabled). Since both our eMMC and SD
controllers have no-sdio; in their device tree configurations, both
should receive this setting.

[1] https://github.com/orangepi-xunlong/linux-orangepi/blob/orange-pi-6.6-ky/drivers/mmc/host/sdhci-of-x1.c#L482

>
> >
> > Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
> > ---
> >  drivers/mmc/host/sdhci-of-k1.c | 13 +++++++++++++
> >  1 file changed, 13 insertions(+)
> >
> > diff --git a/drivers/mmc/host/sdhci-of-k1.c b/drivers/mmc/host/sdhci-of-k1.c
> > index 0cc97e23a2f9c7b2f9376318a8a7ebb860571504..585c7eca6ebf253aac466dd37cef029deb63f692 100644
> > --- a/drivers/mmc/host/sdhci-of-k1.c
> > +++ b/drivers/mmc/host/sdhci-of-k1.c
> > @@ -20,6 +20,13 @@
> >  #include "sdhci.h"
> >  #include "sdhci-pltfm.h"
> >
> > +#define SPACEMIT_SDHC_OP_EXT_REG     0x108
> > +#define  SDHC_OVRRD_CLK_OEN          BIT(11)
> > +#define  SDHC_FORCE_CLK_ON           BIT(12)
> > +
> > +#define SPACEMIT_SDHC_LEGACY_CTRL_REG        0x10C
> > +#define  SDHC_GEN_PAD_CLK_ON         BIT(6)
> > +
> >  #define SPACEMIT_SDHC_MMC_CTRL_REG   0x114
> >  #define  SDHC_MISC_INT_EN            BIT(1)
> >  #define  SDHC_MISC_INT                       BIT(2)
> > @@ -100,6 +107,12 @@ static void spacemit_sdhci_reset(struct sdhci_host *host, u8 mask)
> >
> >       if (!(host->mmc->caps2 & MMC_CAP2_NO_MMC))
> >               spacemit_sdhci_setbits(host, SDHC_MMC_CARD_MODE, SPACEMIT_SDHC_MMC_CTRL_REG);
> > +
> > +     spacemit_sdhci_setbits(host, SDHC_GEN_PAD_CLK_ON, SPACEMIT_SDHC_LEGACY_CTRL_REG);
> > +
> > +     if (host->mmc->caps2 & MMC_CAP2_NO_MMC)
> > +             spacemit_sdhci_setbits(host, SDHC_OVRRD_CLK_OEN | SDHC_FORCE_CLK_ON,
> > +                                    SPACEMIT_SDHC_OP_EXT_REG);
> >  }
> >
> >  static void spacemit_sdhci_set_uhs_signaling(struct sdhci_host *host, unsigned int timing)
> >
>

Re: [PATCH v2 1/7] mmc: sdhci-of-k1: enable essential clock infrastructure for SD operation

[Adrian Hunter]

On 16/03/2026 11:04, Iker Pedrosa wrote:
> El vie, 13 mar 2026 a las 14:04, Adrian Hunter
> (<adrian.hunter@intel.com>) escribió:
>>
>> On 09/03/2026 13:40, Iker Pedrosa wrote:
>>> Ensure SD card pins receive clock signals by enabling pad clock
>>> generation and overriding automatic clock gating. Required for all SD
>>> operation modes.
>>
>> Need to say why update to "SPACEMIT_SDHC_LEGACY_CTRL_REG" is Ok for
>> non-SD
> 
> After analyzing the reference driver implementation[1], the
> SDHC_LEGACY_CTRL_REG setting is applied to both eMMC and SD
> controllers.
> 
> The reference driver sets GEN_PAD_CLK_ON for any controller with
> MMC_CAP2_NO_SDIO set (SDIO disabled). Since both our eMMC and SD
> controllers have no-sdio; in their device tree configurations, both
> should receive this setting.
> 
> [1] https://github.com/orangepi-xunlong/linux-orangepi/blob/orange-pi-6.6-ky/drivers/mmc/host/sdhci-of-x1.c#L482
> 

"I copied it from somewhere else" is not the best explanation,
but better than nothing I guess.  However I meant add the
explanation to the commit message.

[PATCH v2 2/7] mmc: sdhci-of-k1: add regulator and pinctrl voltage switching support

[Iker Pedrosa]

Add voltage switching infrastructure for UHS-I modes by integrating both
regulator framework (for supply voltage control) and pinctrl state
switching (for pin drive strength optimization).

- Add regulator supply parsing and voltage switching callback
- Add optional pinctrl state switching between "default" (3.3V) and
  "state_uhs" (1.8V) configurations
- Enable coordinated voltage and pin configuration changes for UHS modes

This provides complete voltage switching support while maintaining
backward compatibility when pinctrl states are not defined.

Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
---
 drivers/mmc/host/sdhci-of-k1.c | 59 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 59 insertions(+)

diff --git a/drivers/mmc/host/sdhci-of-k1.c b/drivers/mmc/host/sdhci-of-k1.c
index 585c7eca6ebf253aac466dd37cef029deb63f692..8af117a8e271c04a80d8dc7bb5ce12075652dd7a 100644
--- a/drivers/mmc/host/sdhci-of-k1.c
+++ b/drivers/mmc/host/sdhci-of-k1.c
@@ -15,6 +15,7 @@
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
+#include <linux/pinctrl/consumer.h>
 #include <linux/platform_device.h>
 
 #include "sdhci.h"
@@ -70,6 +71,9 @@
 struct spacemit_sdhci_host {
 	struct clk *clk_core;
 	struct clk *clk_io;
+	struct pinctrl *pinctrl;
+	struct pinctrl_state *pinctrl_default;
+	struct pinctrl_state *pinctrl_uhs;
 };
 
 /* All helper functions will update clr/set while preserve rest bits */
@@ -218,6 +222,42 @@ static void spacemit_sdhci_pre_hs400_to_hs200(struct mmc_host *mmc)
 			       SPACEMIT_SDHC_PHY_CTRL_REG);
 }
 
+static void spacemit_sdhci_voltage_switch(struct sdhci_host *host)
+{
+	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+	struct spacemit_sdhci_host *sdhst = sdhci_pltfm_priv(pltfm_host);
+	struct mmc_ios *ios = &host->mmc->ios;
+	struct pinctrl_state *state;
+	int ret;
+
+	/* Select appropriate pinctrl state based on signal voltage */
+	if (sdhst->pinctrl) {
+		switch (ios->signal_voltage) {
+		case MMC_SIGNAL_VOLTAGE_330:
+			state = sdhst->pinctrl_default;
+			break;
+		case MMC_SIGNAL_VOLTAGE_180:
+			state = sdhst->pinctrl_uhs;
+			break;
+		default:
+			dev_warn(mmc_dev(host->mmc), "unsupported voltage %d\n",
+				 ios->signal_voltage);
+			return;
+		}
+
+		if (state) {
+			ret = pinctrl_select_state(sdhst->pinctrl, state);
+			if (ret) {
+				dev_warn(mmc_dev(host->mmc),
+					 "failed to select pinctrl state: %d\n", ret);
+				return;
+			}
+			dev_dbg(mmc_dev(host->mmc), "switched to %s pinctrl state\n",
+				ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180 ? "UHS" : "default");
+		}
+	}
+}
+
 static inline int spacemit_sdhci_get_clocks(struct device *dev,
 					    struct sdhci_pltfm_host *pltfm_host)
 {
@@ -242,6 +282,7 @@ static const struct sdhci_ops spacemit_sdhci_ops = {
 	.set_bus_width		= sdhci_set_bus_width,
 	.set_clock		= spacemit_sdhci_set_clock,
 	.set_uhs_signaling	= spacemit_sdhci_set_uhs_signaling,
+	.voltage_switch         = spacemit_sdhci_voltage_switch,
 };
 
 static const struct sdhci_pltfm_data spacemit_sdhci_k1_pdata = {
@@ -293,6 +334,24 @@ static int spacemit_sdhci_probe(struct platform_device *pdev)
 
 	host->mmc->caps |= MMC_CAP_NEED_RSP_BUSY;
 
+	sdhst = sdhci_pltfm_priv(pltfm_host);
+	sdhst->pinctrl = devm_pinctrl_get(dev);
+	if (!IS_ERR(sdhst->pinctrl)) {
+		sdhst->pinctrl_default = pinctrl_lookup_state(sdhst->pinctrl, "default");
+		if (IS_ERR(sdhst->pinctrl_default))
+			sdhst->pinctrl_default = NULL;
+
+		sdhst->pinctrl_uhs = pinctrl_lookup_state(sdhst->pinctrl, "state_uhs");
+		if (IS_ERR(sdhst->pinctrl_uhs))
+			sdhst->pinctrl_uhs = NULL;
+
+		dev_dbg(dev, "pinctrl setup: default=%p, uhs=%p\n",
+			sdhst->pinctrl_default, sdhst->pinctrl_uhs);
+	} else {
+		sdhst->pinctrl = NULL;
+		dev_dbg(dev, "pinctrl not available, voltage switching will work without it\n");
+	}
+
 	ret = spacemit_sdhci_get_clocks(dev, pltfm_host);
 	if (ret)
 		goto err_pltfm;

-- 
2.53.0

Re: [PATCH v2 2/7] mmc: sdhci-of-k1: add regulator and pinctrl voltage switching support

[Yixun Lan]

Hi Iker,

On 12:40 Mon 09 Mar     , Iker Pedrosa wrote:
> Add voltage switching infrastructure for UHS-I modes by integrating both
> regulator framework (for supply voltage control) and pinctrl state
> switching (for pin drive strength optimization).
> 
> - Add regulator supply parsing and voltage switching callback
> - Add optional pinctrl state switching between "default" (3.3V) and
>   "state_uhs" (1.8V) configurations
> - Enable coordinated voltage and pin configuration changes for UHS modes
> 
> This provides complete voltage switching support while maintaining
> backward compatibility when pinctrl states are not defined.
> 
> Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
> ---
>  drivers/mmc/host/sdhci-of-k1.c | 59 ++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 59 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci-of-k1.c b/drivers/mmc/host/sdhci-of-k1.c
> index 585c7eca6ebf253aac466dd37cef029deb63f692..8af117a8e271c04a80d8dc7bb5ce12075652dd7a 100644
> --- a/drivers/mmc/host/sdhci-of-k1.c
> +++ b/drivers/mmc/host/sdhci-of-k1.c
> @@ -15,6 +15,7 @@
>  #include <linux/module.h>
>  #include <linux/of.h>
>  #include <linux/of_device.h>
> +#include <linux/pinctrl/consumer.h>
>  #include <linux/platform_device.h>
>  
>  #include "sdhci.h"
> @@ -70,6 +71,9 @@
>  struct spacemit_sdhci_host {
>  	struct clk *clk_core;
>  	struct clk *clk_io;
> +	struct pinctrl *pinctrl;
> +	struct pinctrl_state *pinctrl_default;
> +	struct pinctrl_state *pinctrl_uhs;
>  };
>  
>  /* All helper functions will update clr/set while preserve rest bits */
> @@ -218,6 +222,42 @@ static void spacemit_sdhci_pre_hs400_to_hs200(struct mmc_host *mmc)
>  			       SPACEMIT_SDHC_PHY_CTRL_REG);
>  }
>  
> +static void spacemit_sdhci_voltage_switch(struct sdhci_host *host)
> +{
> +	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> +	struct spacemit_sdhci_host *sdhst = sdhci_pltfm_priv(pltfm_host);
> +	struct mmc_ios *ios = &host->mmc->ios;
> +	struct pinctrl_state *state;
> +	int ret;
> +
> +	/* Select appropriate pinctrl state based on signal voltage */
> +	if (sdhst->pinctrl) {
do a sanity check, then abort it early, the advantage is that you can get rid of
one indetation for next code..

	if (!sdhst->pinctrl)
		return;


> +		switch (ios->signal_voltage) {
> +		case MMC_SIGNAL_VOLTAGE_330:
> +			state = sdhst->pinctrl_default;
> +			break;
> +		case MMC_SIGNAL_VOLTAGE_180:
> +			state = sdhst->pinctrl_uhs;
> +			break;
> +		default:
> +			dev_warn(mmc_dev(host->mmc), "unsupported voltage %d\n",
> +				 ios->signal_voltage);
> +			return;
> +		}
> +
> +		if (state) {
> +			ret = pinctrl_select_state(sdhst->pinctrl, state);
> +			if (ret) {
> +				dev_warn(mmc_dev(host->mmc),
> +					 "failed to select pinctrl state: %d\n", ret);
> +				return;
> +			}
> +			dev_dbg(mmc_dev(host->mmc), "switched to %s pinctrl state\n",
> +				ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180 ? "UHS" : "default");
> +		}
> +	}
> +}
> +
>  static inline int spacemit_sdhci_get_clocks(struct device *dev,
>  					    struct sdhci_pltfm_host *pltfm_host)
>  {
> @@ -242,6 +282,7 @@ static const struct sdhci_ops spacemit_sdhci_ops = {
>  	.set_bus_width		= sdhci_set_bus_width,
>  	.set_clock		= spacemit_sdhci_set_clock,
>  	.set_uhs_signaling	= spacemit_sdhci_set_uhs_signaling,
> +	.voltage_switch         = spacemit_sdhci_voltage_switch,
>  };
>  
>  static const struct sdhci_pltfm_data spacemit_sdhci_k1_pdata = {
> @@ -293,6 +334,24 @@ static int spacemit_sdhci_probe(struct platform_device *pdev)
>  
>  	host->mmc->caps |= MMC_CAP_NEED_RSP_BUSY;
>  
> +	sdhst = sdhci_pltfm_priv(pltfm_host);
..
> +	sdhst->pinctrl = devm_pinctrl_get(dev);
> +	if (!IS_ERR(sdhst->pinctrl)) {
> +		sdhst->pinctrl_default = pinctrl_lookup_state(sdhst->pinctrl, "default");
> +		if (IS_ERR(sdhst->pinctrl_default))
> +			sdhst->pinctrl_default = NULL;
> +
> +		sdhst->pinctrl_uhs = pinctrl_lookup_state(sdhst->pinctrl, "state_uhs");
> +		if (IS_ERR(sdhst->pinctrl_uhs))
> +			sdhst->pinctrl_uhs = NULL;
> +
> +		dev_dbg(dev, "pinctrl setup: default=%p, uhs=%p\n",
> +			sdhst->pinctrl_default, sdhst->pinctrl_uhs);
> +	} else {
> +		sdhst->pinctrl = NULL;
> +		dev_dbg(dev, "pinctrl not available, voltage switching will work without it\n");
> +	}
> +
how about creating a function spacemit_sdhci_get_pins()? similar as get
resource for clock, will more readable.

>  	ret = spacemit_sdhci_get_clocks(dev, pltfm_host);
>  	if (ret)
>  		goto err_pltfm;
> 
> -- 
> 2.53.0
> 

-- 
Yixun Lan (dlan)

Re: [PATCH v2 2/7] mmc: sdhci-of-k1: add regulator and pinctrl voltage switching support

[Iker Pedrosa]

El lun, 9 mar 2026 a las 14:22, Yixun Lan (<dlan@kernel.org>) escribió:
>
> Hi Iker,
>
> On 12:40 Mon 09 Mar     , Iker Pedrosa wrote:
> > Add voltage switching infrastructure for UHS-I modes by integrating both
> > regulator framework (for supply voltage control) and pinctrl state
> > switching (for pin drive strength optimization).
> >
> > - Add regulator supply parsing and voltage switching callback
> > - Add optional pinctrl state switching between "default" (3.3V) and
> >   "state_uhs" (1.8V) configurations
> > - Enable coordinated voltage and pin configuration changes for UHS modes
> >
> > This provides complete voltage switching support while maintaining
> > backward compatibility when pinctrl states are not defined.
> >
> > Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
> > ---
> >  drivers/mmc/host/sdhci-of-k1.c | 59 ++++++++++++++++++++++++++++++++++++++++++
> >  1 file changed, 59 insertions(+)
> >
> > diff --git a/drivers/mmc/host/sdhci-of-k1.c b/drivers/mmc/host/sdhci-of-k1.c
> > index 585c7eca6ebf253aac466dd37cef029deb63f692..8af117a8e271c04a80d8dc7bb5ce12075652dd7a 100644
> > --- a/drivers/mmc/host/sdhci-of-k1.c
> > +++ b/drivers/mmc/host/sdhci-of-k1.c
> > @@ -15,6 +15,7 @@
> >  #include <linux/module.h>
> >  #include <linux/of.h>
> >  #include <linux/of_device.h>
> > +#include <linux/pinctrl/consumer.h>
> >  #include <linux/platform_device.h>
> >
> >  #include "sdhci.h"
> > @@ -70,6 +71,9 @@
> >  struct spacemit_sdhci_host {
> >       struct clk *clk_core;
> >       struct clk *clk_io;
> > +     struct pinctrl *pinctrl;
> > +     struct pinctrl_state *pinctrl_default;
> > +     struct pinctrl_state *pinctrl_uhs;
> >  };
> >
> >  /* All helper functions will update clr/set while preserve rest bits */
> > @@ -218,6 +222,42 @@ static void spacemit_sdhci_pre_hs400_to_hs200(struct mmc_host *mmc)
> >                              SPACEMIT_SDHC_PHY_CTRL_REG);
> >  }
> >
> > +static void spacemit_sdhci_voltage_switch(struct sdhci_host *host)
> > +{
> > +     struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> > +     struct spacemit_sdhci_host *sdhst = sdhci_pltfm_priv(pltfm_host);
> > +     struct mmc_ios *ios = &host->mmc->ios;
> > +     struct pinctrl_state *state;
> > +     int ret;
> > +
> > +     /* Select appropriate pinctrl state based on signal voltage */
> > +     if (sdhst->pinctrl) {
> do a sanity check, then abort it early, the advantage is that you can get rid of
> one indetation for next code..
>
>         if (!sdhst->pinctrl)
>                 return;
>

Makes sense. I'll get it ready for the next version.

>
> > +             switch (ios->signal_voltage) {
> > +             case MMC_SIGNAL_VOLTAGE_330:
> > +                     state = sdhst->pinctrl_default;
> > +                     break;
> > +             case MMC_SIGNAL_VOLTAGE_180:
> > +                     state = sdhst->pinctrl_uhs;
> > +                     break;
> > +             default:
> > +                     dev_warn(mmc_dev(host->mmc), "unsupported voltage %d\n",
> > +                              ios->signal_voltage);
> > +                     return;
> > +             }
> > +
> > +             if (state) {
> > +                     ret = pinctrl_select_state(sdhst->pinctrl, state);
> > +                     if (ret) {
> > +                             dev_warn(mmc_dev(host->mmc),
> > +                                      "failed to select pinctrl state: %d\n", ret);
> > +                             return;
> > +                     }
> > +                     dev_dbg(mmc_dev(host->mmc), "switched to %s pinctrl state\n",
> > +                             ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180 ? "UHS" : "default");
> > +             }
> > +     }
> > +}
> > +
> >  static inline int spacemit_sdhci_get_clocks(struct device *dev,
> >                                           struct sdhci_pltfm_host *pltfm_host)
> >  {
> > @@ -242,6 +282,7 @@ static const struct sdhci_ops spacemit_sdhci_ops = {
> >       .set_bus_width          = sdhci_set_bus_width,
> >       .set_clock              = spacemit_sdhci_set_clock,
> >       .set_uhs_signaling      = spacemit_sdhci_set_uhs_signaling,
> > +     .voltage_switch         = spacemit_sdhci_voltage_switch,
> >  };
> >
> >  static const struct sdhci_pltfm_data spacemit_sdhci_k1_pdata = {
> > @@ -293,6 +334,24 @@ static int spacemit_sdhci_probe(struct platform_device *pdev)
> >
> >       host->mmc->caps |= MMC_CAP_NEED_RSP_BUSY;
> >
> > +     sdhst = sdhci_pltfm_priv(pltfm_host);
> ..
> > +     sdhst->pinctrl = devm_pinctrl_get(dev);
> > +     if (!IS_ERR(sdhst->pinctrl)) {
> > +             sdhst->pinctrl_default = pinctrl_lookup_state(sdhst->pinctrl, "default");
> > +             if (IS_ERR(sdhst->pinctrl_default))
> > +                     sdhst->pinctrl_default = NULL;
> > +
> > +             sdhst->pinctrl_uhs = pinctrl_lookup_state(sdhst->pinctrl, "state_uhs");
> > +             if (IS_ERR(sdhst->pinctrl_uhs))
> > +                     sdhst->pinctrl_uhs = NULL;
> > +
> > +             dev_dbg(dev, "pinctrl setup: default=%p, uhs=%p\n",
> > +                     sdhst->pinctrl_default, sdhst->pinctrl_uhs);
> > +     } else {
> > +             sdhst->pinctrl = NULL;
> > +             dev_dbg(dev, "pinctrl not available, voltage switching will work without it\n");
> > +     }
> > +
> how about creating a function spacemit_sdhci_get_pins()? similar as get
> resource for clock, will more readable.

Yes, I'll do that. Thank you for the feedback.

>
> >       ret = spacemit_sdhci_get_clocks(dev, pltfm_host);
> >       if (ret)
> >               goto err_pltfm;
> >
> > --
> > 2.53.0
> >
>
> --
> Yixun Lan (dlan)

Re: [PATCH v2 2/7] mmc: sdhci-of-k1: add regulator and pinctrl voltage switching support

[Adrian Hunter]

On 09/03/2026 13:40, Iker Pedrosa wrote:
> Add voltage switching infrastructure for UHS-I modes by integrating both
> regulator framework (for supply voltage control) and pinctrl state
> switching (for pin drive strength optimization).
> 
> - Add regulator supply parsing and voltage switching callback
> - Add optional pinctrl state switching between "default" (3.3V) and
>   "state_uhs" (1.8V) configurations
> - Enable coordinated voltage and pin configuration changes for UHS modes
> 
> This provides complete voltage switching support while maintaining
> backward compatibility when pinctrl states are not defined.
> 
> Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
> ---
>  drivers/mmc/host/sdhci-of-k1.c | 59 ++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 59 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci-of-k1.c b/drivers/mmc/host/sdhci-of-k1.c
> index 585c7eca6ebf253aac466dd37cef029deb63f692..8af117a8e271c04a80d8dc7bb5ce12075652dd7a 100644
> --- a/drivers/mmc/host/sdhci-of-k1.c
> +++ b/drivers/mmc/host/sdhci-of-k1.c
> @@ -15,6 +15,7 @@
>  #include <linux/module.h>
>  #include <linux/of.h>
>  #include <linux/of_device.h>
> +#include <linux/pinctrl/consumer.h>

Conflicts with "mmc: sdhci-of-k1: add reset support"

Ensure patch applies to 'next' branch of

	git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc.git

>  #include <linux/platform_device.h>
>  
>  #include "sdhci.h"
> @@ -70,6 +71,9 @@
>  struct spacemit_sdhci_host {
>  	struct clk *clk_core;
>  	struct clk *clk_io;
> +	struct pinctrl *pinctrl;
> +	struct pinctrl_state *pinctrl_default;
> +	struct pinctrl_state *pinctrl_uhs;
>  };
>  
>  /* All helper functions will update clr/set while preserve rest bits */
> @@ -218,6 +222,42 @@ static void spacemit_sdhci_pre_hs400_to_hs200(struct mmc_host *mmc)
>  			       SPACEMIT_SDHC_PHY_CTRL_REG);
>  }
>  
> +static void spacemit_sdhci_voltage_switch(struct sdhci_host *host)
> +{
> +	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> +	struct spacemit_sdhci_host *sdhst = sdhci_pltfm_priv(pltfm_host);
> +	struct mmc_ios *ios = &host->mmc->ios;
> +	struct pinctrl_state *state;
> +	int ret;
> +
> +	/* Select appropriate pinctrl state based on signal voltage */
> +	if (sdhst->pinctrl) {
> +		switch (ios->signal_voltage) {

->voltage_switch() is called only for ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180

> +		case MMC_SIGNAL_VOLTAGE_330:
> +			state = sdhst->pinctrl_default;
> +			break;
> +		case MMC_SIGNAL_VOLTAGE_180:
> +			state = sdhst->pinctrl_uhs;
> +			break;
> +		default:
> +			dev_warn(mmc_dev(host->mmc), "unsupported voltage %d\n",
> +				 ios->signal_voltage);
> +			return;
> +		}
> +
> +		if (state) {
> +			ret = pinctrl_select_state(sdhst->pinctrl, state);
> +			if (ret) {
> +				dev_warn(mmc_dev(host->mmc),
> +					 "failed to select pinctrl state: %d\n", ret);
> +				return;
> +			}
> +			dev_dbg(mmc_dev(host->mmc), "switched to %s pinctrl state\n",
> +				ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180 ? "UHS" : "default");
> +		}
> +	}
> +}
> +
>  static inline int spacemit_sdhci_get_clocks(struct device *dev,
>  					    struct sdhci_pltfm_host *pltfm_host)
>  {
> @@ -242,6 +282,7 @@ static const struct sdhci_ops spacemit_sdhci_ops = {
>  	.set_bus_width		= sdhci_set_bus_width,
>  	.set_clock		= spacemit_sdhci_set_clock,
>  	.set_uhs_signaling	= spacemit_sdhci_set_uhs_signaling,
> +	.voltage_switch         = spacemit_sdhci_voltage_switch,
>  };
>  
>  static const struct sdhci_pltfm_data spacemit_sdhci_k1_pdata = {
> @@ -293,6 +334,24 @@ static int spacemit_sdhci_probe(struct platform_device *pdev)
>  
>  	host->mmc->caps |= MMC_CAP_NEED_RSP_BUSY;
>  
> +	sdhst = sdhci_pltfm_priv(pltfm_host);
> +	sdhst->pinctrl = devm_pinctrl_get(dev);
> +	if (!IS_ERR(sdhst->pinctrl)) {
> +		sdhst->pinctrl_default = pinctrl_lookup_state(sdhst->pinctrl, "default");
> +		if (IS_ERR(sdhst->pinctrl_default))
> +			sdhst->pinctrl_default = NULL;
> +
> +		sdhst->pinctrl_uhs = pinctrl_lookup_state(sdhst->pinctrl, "state_uhs");
> +		if (IS_ERR(sdhst->pinctrl_uhs))
> +			sdhst->pinctrl_uhs = NULL;
> +
> +		dev_dbg(dev, "pinctrl setup: default=%p, uhs=%p\n",
> +			sdhst->pinctrl_default, sdhst->pinctrl_uhs);
> +	} else {
> +		sdhst->pinctrl = NULL;
> +		dev_dbg(dev, "pinctrl not available, voltage switching will work without it\n");
> +	}
> +
>  	ret = spacemit_sdhci_get_clocks(dev, pltfm_host);
>  	if (ret)
>  		goto err_pltfm;
> 

[PATCH v2 3/7] mmc: sdhci-of-k1: add SDR tuning infrastructure

[Iker Pedrosa]

Add register definitions and delay line control functions to prepare for
SDR50/SDR104 tuning support:

- Add tuning register definitions (RX_CFG, DLINE_CTRL, DLINE_CFG)
- Add delay line control helper functions
- Add tuning preparation function

This infrastructure prepares for implementing the SDR tuning algorithm
while maintaining all existing functionality.

Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
---
 drivers/mmc/host/sdhci-of-k1.c | 61 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 61 insertions(+)

diff --git a/drivers/mmc/host/sdhci-of-k1.c b/drivers/mmc/host/sdhci-of-k1.c
index 8af117a8e271c04a80d8dc7bb5ce12075652dd7a..79cb7c8d0b6d9c4206bf01721651c8efe8a173c9 100644
--- a/drivers/mmc/host/sdhci-of-k1.c
+++ b/drivers/mmc/host/sdhci-of-k1.c
@@ -68,6 +68,23 @@
 #define  SDHC_PHY_DRIVE_SEL		GENMASK(2, 0)
 #define  SDHC_RX_BIAS_CTRL		BIT(5)
 
+#define SPACEMIT_SDHC_RX_CFG_REG        0x118
+#define  SDHC_RX_SDCLK_SEL0_MASK        GENMASK(1, 0)
+#define  SDHC_RX_SDCLK_SEL1_MASK        GENMASK(3, 2)
+#define  SDHC_RX_SDCLK_SEL1             FIELD_PREP(SDHC_RX_SDCLK_SEL1_MASK, 1)
+
+#define SPACEMIT_SDHC_DLINE_CTRL_REG    0x130
+#define  SDHC_DLINE_PU                  BIT(0)
+#define  SDHC_RX_DLINE_CODE_MASK        GENMASK(23, 16)
+#define  SDHC_TX_DLINE_CODE_MASK        GENMASK(31, 24)
+
+#define SPACEMIT_SDHC_DLINE_CFG_REG     0x134
+#define  SDHC_RX_DLINE_REG_MASK         GENMASK(7, 0)
+#define  SDHC_RX_DLINE_GAIN             BIT(8)
+#define  SDHC_TX_DLINE_REG_MASK         GENMASK(23, 16)
+
+#define SPACEMIT_RX_DLINE_REG		9
+
 struct spacemit_sdhci_host {
 	struct clk *clk_core;
 	struct clk *clk_io;
@@ -95,6 +112,50 @@ static inline void spacemit_sdhci_clrsetbits(struct sdhci_host *host, u32 clr, u
 	sdhci_writel(host, val, reg);
 }
 
+static void spacemit_sdhci_set_rx_delay(struct sdhci_host *host, u8 delay)
+{
+	spacemit_sdhci_clrsetbits(host, SDHC_RX_DLINE_CODE_MASK,
+				  FIELD_PREP(SDHC_RX_DLINE_CODE_MASK, delay),
+				  SPACEMIT_SDHC_DLINE_CTRL_REG);
+}
+
+static void spacemit_sdhci_set_tx_delay(struct sdhci_host *host, u8 delay)
+{
+	spacemit_sdhci_clrsetbits(host, SDHC_TX_DLINE_CODE_MASK,
+				  FIELD_PREP(SDHC_TX_DLINE_CODE_MASK, delay),
+				  SPACEMIT_SDHC_DLINE_CTRL_REG);
+}
+
+static void spacemit_sdhci_set_tx_dline_reg(struct sdhci_host *host, u8 dline_reg)
+{
+	spacemit_sdhci_clrsetbits(host, SDHC_TX_DLINE_REG_MASK,
+				  FIELD_PREP(SDHC_TX_DLINE_REG_MASK, dline_reg),
+				  SPACEMIT_SDHC_DLINE_CFG_REG);
+}
+
+static void spacemit_sdhci_tx_tuning_prepare(struct sdhci_host *host)
+{
+	spacemit_sdhci_setbits(host, SDHC_TX_MUX_SEL, SPACEMIT_SDHC_TX_CFG_REG);
+	spacemit_sdhci_setbits(host, SDHC_DLINE_PU, SPACEMIT_SDHC_DLINE_CTRL_REG);
+	udelay(5);
+}
+
+static void spacemit_sdhci_prepare_tuning(struct sdhci_host *host)
+{
+	spacemit_sdhci_clrsetbits(host, SDHC_RX_DLINE_REG_MASK,
+				  FIELD_PREP(SDHC_RX_DLINE_REG_MASK, SPACEMIT_RX_DLINE_REG),
+				  SPACEMIT_SDHC_DLINE_CFG_REG);
+
+	spacemit_sdhci_setbits(host, SDHC_DLINE_PU, SPACEMIT_SDHC_DLINE_CTRL_REG);
+	udelay(5);
+
+	spacemit_sdhci_clrsetbits(host, SDHC_RX_SDCLK_SEL1_MASK, SDHC_RX_SDCLK_SEL1,
+				  SPACEMIT_SDHC_RX_CFG_REG);
+
+	if (host->mmc->ios.timing == MMC_TIMING_MMC_HS200)
+		spacemit_sdhci_setbits(host, SDHC_HS200_USE_RFIFO, SPACEMIT_SDHC_PHY_FUNC_REG);
+}
+
 static void spacemit_sdhci_reset(struct sdhci_host *host, u8 mask)
 {
 	sdhci_reset(host, mask);

-- 
2.53.0

Re: [PATCH v2 3/7] mmc: sdhci-of-k1: add SDR tuning infrastructure

[Adrian Hunter]

On 09/03/2026 13:40, Iker Pedrosa wrote:
> Add register definitions and delay line control functions to prepare for
> SDR50/SDR104 tuning support:
> 
> - Add tuning register definitions (RX_CFG, DLINE_CTRL, DLINE_CFG)
> - Add delay line control helper functions
> - Add tuning preparation function
> 
> This infrastructure prepares for implementing the SDR tuning algorithm
> while maintaining all existing functionality.
> 
> Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
> ---
>  drivers/mmc/host/sdhci-of-k1.c | 61 ++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 61 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci-of-k1.c b/drivers/mmc/host/sdhci-of-k1.c
> index 8af117a8e271c04a80d8dc7bb5ce12075652dd7a..79cb7c8d0b6d9c4206bf01721651c8efe8a173c9 100644
> --- a/drivers/mmc/host/sdhci-of-k1.c
> +++ b/drivers/mmc/host/sdhci-of-k1.c
> @@ -68,6 +68,23 @@
>  #define  SDHC_PHY_DRIVE_SEL		GENMASK(2, 0)
>  #define  SDHC_RX_BIAS_CTRL		BIT(5)
>  
> +#define SPACEMIT_SDHC_RX_CFG_REG        0x118
> +#define  SDHC_RX_SDCLK_SEL0_MASK        GENMASK(1, 0)
> +#define  SDHC_RX_SDCLK_SEL1_MASK        GENMASK(3, 2)
> +#define  SDHC_RX_SDCLK_SEL1             FIELD_PREP(SDHC_RX_SDCLK_SEL1_MASK, 1)
> +
> +#define SPACEMIT_SDHC_DLINE_CTRL_REG    0x130
> +#define  SDHC_DLINE_PU                  BIT(0)
> +#define  SDHC_RX_DLINE_CODE_MASK        GENMASK(23, 16)
> +#define  SDHC_TX_DLINE_CODE_MASK        GENMASK(31, 24)
> +
> +#define SPACEMIT_SDHC_DLINE_CFG_REG     0x134
> +#define  SDHC_RX_DLINE_REG_MASK         GENMASK(7, 0)
> +#define  SDHC_RX_DLINE_GAIN             BIT(8)
> +#define  SDHC_TX_DLINE_REG_MASK         GENMASK(23, 16)
> +
> +#define SPACEMIT_RX_DLINE_REG		9
> +
>  struct spacemit_sdhci_host {
>  	struct clk *clk_core;
>  	struct clk *clk_io;
> @@ -95,6 +112,50 @@ static inline void spacemit_sdhci_clrsetbits(struct sdhci_host *host, u32 clr, u
>  	sdhci_writel(host, val, reg);
>  }
>  
> +static void spacemit_sdhci_set_rx_delay(struct sdhci_host *host, u8 delay)
> +{
> +	spacemit_sdhci_clrsetbits(host, SDHC_RX_DLINE_CODE_MASK,
> +				  FIELD_PREP(SDHC_RX_DLINE_CODE_MASK, delay),
> +				  SPACEMIT_SDHC_DLINE_CTRL_REG);
> +}
> +
> +static void spacemit_sdhci_set_tx_delay(struct sdhci_host *host, u8 delay)
> +{
> +	spacemit_sdhci_clrsetbits(host, SDHC_TX_DLINE_CODE_MASK,
> +				  FIELD_PREP(SDHC_TX_DLINE_CODE_MASK, delay),
> +				  SPACEMIT_SDHC_DLINE_CTRL_REG);
> +}
> +
> +static void spacemit_sdhci_set_tx_dline_reg(struct sdhci_host *host, u8 dline_reg)
> +{
> +	spacemit_sdhci_clrsetbits(host, SDHC_TX_DLINE_REG_MASK,
> +				  FIELD_PREP(SDHC_TX_DLINE_REG_MASK, dline_reg),
> +				  SPACEMIT_SDHC_DLINE_CFG_REG);
> +}
> +
> +static void spacemit_sdhci_tx_tuning_prepare(struct sdhci_host *host)
> +{
> +	spacemit_sdhci_setbits(host, SDHC_TX_MUX_SEL, SPACEMIT_SDHC_TX_CFG_REG);
> +	spacemit_sdhci_setbits(host, SDHC_DLINE_PU, SPACEMIT_SDHC_DLINE_CTRL_REG);
> +	udelay(5);
> +}
> +
> +static void spacemit_sdhci_prepare_tuning(struct sdhci_host *host)
> +{
> +	spacemit_sdhci_clrsetbits(host, SDHC_RX_DLINE_REG_MASK,
> +				  FIELD_PREP(SDHC_RX_DLINE_REG_MASK, SPACEMIT_RX_DLINE_REG),
> +				  SPACEMIT_SDHC_DLINE_CFG_REG);
> +
> +	spacemit_sdhci_setbits(host, SDHC_DLINE_PU, SPACEMIT_SDHC_DLINE_CTRL_REG);
> +	udelay(5);
> +
> +	spacemit_sdhci_clrsetbits(host, SDHC_RX_SDCLK_SEL1_MASK, SDHC_RX_SDCLK_SEL1,
> +				  SPACEMIT_SDHC_RX_CFG_REG);
> +
> +	if (host->mmc->ios.timing == MMC_TIMING_MMC_HS200)
> +		spacemit_sdhci_setbits(host, SDHC_HS200_USE_RFIFO, SPACEMIT_SDHC_PHY_FUNC_REG);
> +}

Doesn't compile:

drivers/mmc/host/sdhci-of-k1.c:144:13: error: ‘spacemit_sdhci_prepare_tuning’ defined but not used [-Werror=unused-function]
  144 | static void spacemit_sdhci_prepare_tuning(struct sdhci_host *host)
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/mmc/host/sdhci-of-k1.c:137:13: error: ‘spacemit_sdhci_tx_tuning_prepare’ defined but not used [-Werror=unused-function]
  137 | static void spacemit_sdhci_tx_tuning_prepare(struct sdhci_host *host)
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/mmc/host/sdhci-of-k1.c:130:13: error: ‘spacemit_sdhci_set_tx_dline_reg’ defined but not used [-Werror=unused-function]
  130 | static void spacemit_sdhci_set_tx_dline_reg(struct sdhci_host *host, u8 dline_reg)
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/mmc/host/sdhci-of-k1.c:123:13: error: ‘spacemit_sdhci_set_tx_delay’ defined but not used [-Werror=unused-function]
  123 | static void spacemit_sdhci_set_tx_delay(struct sdhci_host *host, u8 delay)
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/mmc/host/sdhci-of-k1.c:116:13: error: ‘spacemit_sdhci_set_rx_delay’ defined but not used [-Werror=unused-function]
  116 | static void spacemit_sdhci_set_rx_delay(struct sdhci_host *host, u8 delay)
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~

Squash it into the next patch I guess

> +
>  static void spacemit_sdhci_reset(struct sdhci_host *host, u8 mask)
>  {
>  	sdhci_reset(host, mask);
> 

[PATCH v2 4/7] mmc: sdhci-of-k1: add comprehensive SDR tuning support

[Iker Pedrosa]

Implement software tuning algorithm to enable UHS-I SDR modes for SD
card operation. This adds both TX and RX delay line tuning based on the
SpacemiT K1 controller capabilities.

Key features:
- Conditional tuning: only tune when SD card is present and for
  high-speed modes (≥100MHz)
- TX tuning: configure transmit delay line with default values
  (dline_reg=0, delaycode=127) to ensure optimal signal output timing
- RX tuning: test full delay range (0-255) with window detection
  algorithm to find optimal receive timing
- Retry mechanism: multiple fallback delays within optimal window for
  improved reliability
- Complete register support: add delay line control and configuration
  register definitions for fine-grained timing control

Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
---
 drivers/mmc/host/sdhci-of-k1.c | 119 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 119 insertions(+)

diff --git a/drivers/mmc/host/sdhci-of-k1.c b/drivers/mmc/host/sdhci-of-k1.c
index 79cb7c8d0b6d9c4206bf01721651c8efe8a173c9..d903851b9be0e1d21a2b30636f5e63a52cad0dc2 100644
--- a/drivers/mmc/host/sdhci-of-k1.c
+++ b/drivers/mmc/host/sdhci-of-k1.c
@@ -84,6 +84,12 @@
 #define  SDHC_TX_DLINE_REG_MASK         GENMASK(23, 16)
 
 #define SPACEMIT_RX_DLINE_REG		9
+#define SPACEMIT_RX_TUNE_DELAY_MIN	0x0
+#define SPACEMIT_RX_TUNE_DELAY_MAX	0xFF
+#define SPACEMIT_RX_TUNE_DELAY_STEP	0x1
+
+#define SPACEMIT_TX_TUNING_DLINE_REG	0x00
+#define SPACEMIT_TX_TUNING_DELAYCODE	127
 
 struct spacemit_sdhci_host {
 	struct clk *clk_core;
@@ -251,6 +257,118 @@ static unsigned int spacemit_sdhci_clk_get_max_clock(struct sdhci_host *host)
 	return clk_get_rate(pltfm_host->clk);
 }
 
+static int spacemit_sdhci_execute_tuning(struct sdhci_host *host, u32 opcode)
+{
+	int ret = 0;
+	int i;
+	bool pass_window[SPACEMIT_RX_TUNE_DELAY_MAX + 1] = {false};
+	int pass_len = 0, pass_start = 0, max_pass_len = 0, max_pass_start = 0;
+	u8 final_delay;
+	struct mmc_host *mmc = host->mmc;
+	struct mmc_ios ios = mmc->ios;
+
+	/*
+	 * Tuning is required for SDR50/SDR104, HS200/HS400 cards and
+	 * if clock frequency is greater than 100MHz in these modes.
+	 */
+	if (host->clock < 100 * 1000 * 1000 ||
+	    !(ios.timing == MMC_TIMING_MMC_HS200 ||
+	      ios.timing == MMC_TIMING_UHS_SDR50 ||
+	      ios.timing == MMC_TIMING_UHS_SDR104))
+		return 0;
+
+	if (!(mmc->caps2 & MMC_CAP2_NO_SD) && !mmc->ops->get_cd(mmc))
+		return 0;
+
+	if (mmc->caps2 & MMC_CAP2_NO_MMC) {
+		spacemit_sdhci_set_tx_dline_reg(host, SPACEMIT_TX_TUNING_DLINE_REG);
+		spacemit_sdhci_set_tx_delay(host, SPACEMIT_TX_TUNING_DELAYCODE);
+		spacemit_sdhci_tx_tuning_prepare(host);
+
+		dev_dbg(mmc_dev(host->mmc), "TX tuning: dline_reg=%d, delaycode=%d\n",
+			SPACEMIT_TX_TUNING_DLINE_REG, SPACEMIT_TX_TUNING_DELAYCODE);
+	}
+
+	spacemit_sdhci_prepare_tuning(host);
+
+	for (i = SPACEMIT_RX_TUNE_DELAY_MIN; i <= SPACEMIT_RX_TUNE_DELAY_MAX;
+	     i += SPACEMIT_RX_TUNE_DELAY_STEP) {
+		spacemit_sdhci_set_rx_delay(host, i);
+
+		ret = mmc_send_tuning(host->mmc, opcode, NULL);
+		pass_window[i] = (ret == 0);
+
+		dev_dbg(mmc_dev(host->mmc), "RX delay %d: %s\n",
+			i, pass_window[i] ? "pass" : "fail");
+	}
+
+	for (i = SPACEMIT_RX_TUNE_DELAY_MIN; i <= SPACEMIT_RX_TUNE_DELAY_MAX;
+	     i += SPACEMIT_RX_TUNE_DELAY_STEP) {
+		if (pass_window[i]) {
+			if (pass_len == 0)
+				pass_start = i;
+			pass_len++;
+		} else {
+			if (pass_len > max_pass_len) {
+				max_pass_len = pass_len;
+				max_pass_start = pass_start;
+			}
+			pass_len = 0;
+		}
+	}
+
+	if (pass_len > max_pass_len) {
+		max_pass_len = pass_len;
+		max_pass_start = pass_start;
+	}
+
+	if (max_pass_len < 3) {
+		dev_err(mmc_dev(host->mmc), "Tuning failed: no stable window found\n");
+		return -EIO;
+	}
+
+	final_delay = max_pass_start + max_pass_len / 2;
+	spacemit_sdhci_set_rx_delay(host, final_delay);
+	ret = mmc_send_tuning(host->mmc, opcode, NULL);
+	if (ret) {
+		u8 retry_delays[] = {
+			max_pass_start + max_pass_len / 4,
+			max_pass_start + (3 * max_pass_len) / 4,
+			max_pass_start,
+			max_pass_start + max_pass_len - 1
+		};
+		int retry_count = ARRAY_SIZE(retry_delays);
+
+		dev_warn(mmc_dev(mmc), "Primary delay %d failed, trying alternatives\n",
+			 final_delay);
+
+		for (i = 0; i < retry_count; i++) {
+			if (retry_delays[i] >= SPACEMIT_RX_TUNE_DELAY_MIN &&
+			    retry_delays[i] <= SPACEMIT_RX_TUNE_DELAY_MAX) {
+				spacemit_sdhci_set_rx_delay(host, retry_delays[i]);
+				ret = mmc_send_tuning(host->mmc, opcode, NULL);
+				if (!ret) {
+					final_delay = retry_delays[i];
+					dev_info(mmc_dev(mmc), "Retry successful with delay %d\n",
+						 final_delay);
+					break;
+				}
+			}
+		}
+
+		if (ret) {
+			dev_err(mmc_dev(mmc), "All retry attempts failed\n");
+			return -EIO;
+		}
+	}
+
+	dev_dbg(mmc_dev(host->mmc),
+		"Tuning successful: window %d-%d, using delay %d\n",
+		max_pass_start, max_pass_start + max_pass_len - 1, final_delay);
+
+	return 0;
+}
+
 static int spacemit_sdhci_pre_select_hs400(struct mmc_host *mmc)
 {
 	struct sdhci_host *host = mmc_priv(mmc);
@@ -344,6 +462,7 @@ static const struct sdhci_ops spacemit_sdhci_ops = {
 	.set_clock		= spacemit_sdhci_set_clock,
 	.set_uhs_signaling	= spacemit_sdhci_set_uhs_signaling,
 	.voltage_switch         = spacemit_sdhci_voltage_switch,
+	.platform_execute_tuning = spacemit_sdhci_execute_tuning,
 };
 
 static const struct sdhci_pltfm_data spacemit_sdhci_k1_pdata = {

-- 
2.53.0

Re: [PATCH v2 4/7] mmc: sdhci-of-k1: add comprehensive SDR tuning support

[Adrian Hunter]

On 09/03/2026 13:40, Iker Pedrosa wrote:
> Implement software tuning algorithm to enable UHS-I SDR modes for SD
> card operation. This adds both TX and RX delay line tuning based on the
> SpacemiT K1 controller capabilities.

Need to say something about the HS200 support since it is
eMMC only

> 
> Key features:
> - Conditional tuning: only tune when SD card is present and for
>   high-speed modes (≥100MHz)
> - TX tuning: configure transmit delay line with default values
>   (dline_reg=0, delaycode=127) to ensure optimal signal output timing
> - RX tuning: test full delay range (0-255) with window detection
>   algorithm to find optimal receive timing
> - Retry mechanism: multiple fallback delays within optimal window for
>   improved reliability
> - Complete register support: add delay line control and configuration
>   register definitions for fine-grained timing control
> 
> Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
> ---
>  drivers/mmc/host/sdhci-of-k1.c | 119 +++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 119 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci-of-k1.c b/drivers/mmc/host/sdhci-of-k1.c
> index 79cb7c8d0b6d9c4206bf01721651c8efe8a173c9..d903851b9be0e1d21a2b30636f5e63a52cad0dc2 100644
> --- a/drivers/mmc/host/sdhci-of-k1.c
> +++ b/drivers/mmc/host/sdhci-of-k1.c
> @@ -84,6 +84,12 @@
>  #define  SDHC_TX_DLINE_REG_MASK         GENMASK(23, 16)
>  
>  #define SPACEMIT_RX_DLINE_REG		9
> +#define SPACEMIT_RX_TUNE_DELAY_MIN	0x0
> +#define SPACEMIT_RX_TUNE_DELAY_MAX	0xFF
> +#define SPACEMIT_RX_TUNE_DELAY_STEP	0x1
> +
> +#define SPACEMIT_TX_TUNING_DLINE_REG	0x00
> +#define SPACEMIT_TX_TUNING_DELAYCODE	127
>  
>  struct spacemit_sdhci_host {
>  	struct clk *clk_core;
> @@ -251,6 +257,118 @@ static unsigned int spacemit_sdhci_clk_get_max_clock(struct sdhci_host *host)
>  	return clk_get_rate(pltfm_host->clk);
>  }
>  
> +static int spacemit_sdhci_execute_tuning(struct sdhci_host *host, u32 opcode)
> +{
> +	int ret = 0;
> +	int i;
> +	bool pass_window[SPACEMIT_RX_TUNE_DELAY_MAX + 1] = {false};
> +	int pass_len = 0, pass_start = 0, max_pass_len = 0, max_pass_start = 0;
> +	u8 final_delay;
> +	struct mmc_host *mmc = host->mmc;
> +	struct mmc_ios ios = mmc->ios;

Prefer to arrange local definitions/declarations in order of
descending line length e.g.

	int pass_len = 0, pass_start = 0, max_pass_len = 0, max_pass_start = 0;
	bool pass_window[SPACEMIT_RX_TUNE_DELAY_MAX + 1] = {false};
	struct mmc_host *mmc = host->mmc;
	struct mmc_ios ios = mmc->ios;
	u8 final_delay;
	int ret = 0;
	int i;

> +
> +	/*
> +	 * Tuning is required for SDR50/SDR104, HS200/HS400 cards and
> +	 * if clock frequency is greater than 100MHz in these modes.
> +	 */
> +	if (host->clock < 100 * 1000 * 1000 ||
> +	    !(ios.timing == MMC_TIMING_MMC_HS200 ||
> +	      ios.timing == MMC_TIMING_UHS_SDR50 ||
> +	      ios.timing == MMC_TIMING_UHS_SDR104))
> +		return 0;
> +
> +	if (!(mmc->caps2 & MMC_CAP2_NO_SD) && !mmc->ops->get_cd(mmc))
> +		return 0;
> +
> +	if (mmc->caps2 & MMC_CAP2_NO_MMC) {
> +		spacemit_sdhci_set_tx_dline_reg(host, SPACEMIT_TX_TUNING_DLINE_REG);
> +		spacemit_sdhci_set_tx_delay(host, SPACEMIT_TX_TUNING_DELAYCODE);
> +		spacemit_sdhci_tx_tuning_prepare(host);
> +
> +		dev_dbg(mmc_dev(host->mmc), "TX tuning: dline_reg=%d, delaycode=%d\n",
> +			SPACEMIT_TX_TUNING_DLINE_REG, SPACEMIT_TX_TUNING_DELAYCODE);
> +	}
> +
> +	spacemit_sdhci_prepare_tuning(host);
> +
> +	for (i = SPACEMIT_RX_TUNE_DELAY_MIN; i <= SPACEMIT_RX_TUNE_DELAY_MAX;
> +	     i += SPACEMIT_RX_TUNE_DELAY_STEP) {
> +		spacemit_sdhci_set_rx_delay(host, i);
> +
> +		ret = mmc_send_tuning(host->mmc, opcode, NULL);
> +		pass_window[i] = (ret == 0);
> +
> +		dev_dbg(mmc_dev(host->mmc), "RX delay %d: %s\n",
> +			i, pass_window[i] ? "pass" : "fail");
> +	}
> +
> +	for (i = SPACEMIT_RX_TUNE_DELAY_MIN; i <= SPACEMIT_RX_TUNE_DELAY_MAX;
> +	     i += SPACEMIT_RX_TUNE_DELAY_STEP) {
> +		if (pass_window[i]) {
> +			if (pass_len == 0)
> +				pass_start = i;
> +			pass_len++;
> +		} else {
> +			if (pass_len > max_pass_len) {
> +				max_pass_len = pass_len;
> +				max_pass_start = pass_start;
> +			}
> +			pass_len = 0;
> +		}
> +	}
> +
> +	if (pass_len > max_pass_len) {
> +		max_pass_len = pass_len;
> +		max_pass_start = pass_start;
> +	}
> +
> +	if (max_pass_len < 3) {
> +		dev_err(mmc_dev(host->mmc), "Tuning failed: no stable window found\n");
> +		return -EIO;
> +	}
> +
> +	final_delay = max_pass_start + max_pass_len / 2;
> +	spacemit_sdhci_set_rx_delay(host, final_delay);
> +	ret = mmc_send_tuning(host->mmc, opcode, NULL);
> +	if (ret) {
> +		u8 retry_delays[] = {
> +			max_pass_start + max_pass_len / 4,
> +			max_pass_start + (3 * max_pass_len) / 4,
> +			max_pass_start,
> +			max_pass_start + max_pass_len - 1
> +		};
> +		int retry_count = ARRAY_SIZE(retry_delays);
> +
> +		dev_warn(mmc_dev(mmc), "Primary delay %d failed, trying alternatives\n",
> +			 final_delay);
> +
> +		for (i = 0; i < retry_count; i++) {
> +			if (retry_delays[i] >= SPACEMIT_RX_TUNE_DELAY_MIN &&
> +			    retry_delays[i] <= SPACEMIT_RX_TUNE_DELAY_MAX) {
> +				spacemit_sdhci_set_rx_delay(host, retry_delays[i]);
> +				ret = mmc_send_tuning(host->mmc, opcode, NULL);
> +				if (!ret) {
> +					final_delay = retry_delays[i];
> +					dev_info(mmc_dev(mmc), "Retry successful with delay %d\n",
> +						 final_delay);
> +					break;
> +				}
> +			}
> +		}
> +
> +		if (ret) {
> +			dev_err(mmc_dev(mmc), "All retry attempts failed\n");
> +			return -EIO;
> +		}
> +	}
> +
> +	dev_dbg(mmc_dev(host->mmc),
> +		"Tuning successful: window %d-%d, using delay %d\n",
> +		max_pass_start, max_pass_start + max_pass_len - 1, final_delay);
> +
> +	return 0;
> +}
> +
>  static int spacemit_sdhci_pre_select_hs400(struct mmc_host *mmc)
>  {
>  	struct sdhci_host *host = mmc_priv(mmc);
> @@ -344,6 +462,7 @@ static const struct sdhci_ops spacemit_sdhci_ops = {
>  	.set_clock		= spacemit_sdhci_set_clock,
>  	.set_uhs_signaling	= spacemit_sdhci_set_uhs_signaling,
>  	.voltage_switch         = spacemit_sdhci_voltage_switch,
> +	.platform_execute_tuning = spacemit_sdhci_execute_tuning,
>  };
>  
>  static const struct sdhci_pltfm_data spacemit_sdhci_k1_pdata = {
> 

Re: [PATCH v2 4/7] mmc: sdhci-of-k1: add comprehensive SDR tuning support

[Yao Zi]

On Mon, Mar 09, 2026 at 12:40:14PM +0100, Iker Pedrosa wrote:
> Implement software tuning algorithm to enable UHS-I SDR modes for SD
> card operation. This adds both TX and RX delay line tuning based on the
> SpacemiT K1 controller capabilities.
> 
> Key features:
> - Conditional tuning: only tune when SD card is present and for
>   high-speed modes (≥100MHz)
> - TX tuning: configure transmit delay line with default values
>   (dline_reg=0, delaycode=127) to ensure optimal signal output timing
> - RX tuning: test full delay range (0-255) with window detection
>   algorithm to find optimal receive timing
> - Retry mechanism: multiple fallback delays within optimal window for
>   improved reliability
> - Complete register support: add delay line control and configuration
>   register definitions for fine-grained timing control
> 
> Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>

Sorry for raising this late: I think PATCH 3 and PATCH 4 (this one)
should also be squashed together to form a complete functionality, I
also doubt otherwise whether compilers complain about unused static
functions with only PATCH 3 applied.

> ---
>  drivers/mmc/host/sdhci-of-k1.c | 119 +++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 119 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci-of-k1.c b/drivers/mmc/host/sdhci-of-k1.c
> index 79cb7c8d0b6d9c4206bf01721651c8efe8a173c9..d903851b9be0e1d21a2b30636f5e63a52cad0dc2 100644
> --- a/drivers/mmc/host/sdhci-of-k1.c
> +++ b/drivers/mmc/host/sdhci-of-k1.c
> @@ -84,6 +84,12 @@
>  #define  SDHC_TX_DLINE_REG_MASK         GENMASK(23, 16)
>  
>  #define SPACEMIT_RX_DLINE_REG		9
> +#define SPACEMIT_RX_TUNE_DELAY_MIN	0x0
> +#define SPACEMIT_RX_TUNE_DELAY_MAX	0xFF
> +#define SPACEMIT_RX_TUNE_DELAY_STEP	0x1

I think the STEP constant isn't very helpful, to me its purpose is
quite obvious in spacemit_sdhci_execute_tuning(), and you could simplify
the tuning function without adding confusing magic numbers -- since the
constant is literally one.

> +#define SPACEMIT_TX_TUNING_DLINE_REG	0x00
> +#define SPACEMIT_TX_TUNING_DELAYCODE	127

...

> +static int spacemit_sdhci_execute_tuning(struct sdhci_host *host, u32 opcode)
> +{
> +	int ret = 0;
> +	int i;
> +	bool pass_window[SPACEMIT_RX_TUNE_DELAY_MAX + 1] = {false};
> +	int pass_len = 0, pass_start = 0, max_pass_len = 0, max_pass_start = 0;
> +	u8 final_delay;
> +	struct mmc_host *mmc = host->mmc;
> +	struct mmc_ios ios = mmc->ios;
> +
> +	/*
> +	 * Tuning is required for SDR50/SDR104, HS200/HS400 cards and
> +	 * if clock frequency is greater than 100MHz in these modes.
> +	 */
> +	if (host->clock < 100 * 1000 * 1000 ||
> +	    !(ios.timing == MMC_TIMING_MMC_HS200 ||
> +	      ios.timing == MMC_TIMING_UHS_SDR50 ||
> +	      ios.timing == MMC_TIMING_UHS_SDR104))
> +		return 0;
> +
> +	if (!(mmc->caps2 & MMC_CAP2_NO_SD) && !mmc->ops->get_cd(mmc))
> +		return 0;

Is this check really necessary? Shouldn't this be handled in MMC core
instead?

> +	if (mmc->caps2 & MMC_CAP2_NO_MMC) {
> +		spacemit_sdhci_set_tx_dline_reg(host, SPACEMIT_TX_TUNING_DLINE_REG);
> +		spacemit_sdhci_set_tx_delay(host, SPACEMIT_TX_TUNING_DELAYCODE);
> +		spacemit_sdhci_tx_tuning_prepare(host);
> +
> +		dev_dbg(mmc_dev(host->mmc), "TX tuning: dline_reg=%d, delaycode=%d\n",
> +			SPACEMIT_TX_TUNING_DLINE_REG, SPACEMIT_TX_TUNING_DELAYCODE);
> +	}
> +
> +	spacemit_sdhci_prepare_tuning(host);
> +
> +	for (i = SPACEMIT_RX_TUNE_DELAY_MIN; i <= SPACEMIT_RX_TUNE_DELAY_MAX;
> +	     i += SPACEMIT_RX_TUNE_DELAY_STEP) {

The last expression could be simply i++ if you drop
SPACEMIT_RX_TUNE_DELAY_STEP, this is still quite readable. Same for the
loop below.

> +		spacemit_sdhci_set_rx_delay(host, i);
> +
> +		ret = mmc_send_tuning(host->mmc, opcode, NULL);
> +		pass_window[i] = (ret == 0);
> +
> +		dev_dbg(mmc_dev(host->mmc), "RX delay %d: %s\n",
> +			i, pass_window[i] ? "pass" : "fail");
> +	}
> +
> +	for (i = SPACEMIT_RX_TUNE_DELAY_MIN; i <= SPACEMIT_RX_TUNE_DELAY_MAX;
> +	     i += SPACEMIT_RX_TUNE_DELAY_STEP) {
> +		if (pass_window[i]) {
> +			if (pass_len == 0)
> +				pass_start = i;
> +			pass_len++;
> +		} else {
> +			if (pass_len > max_pass_len) {
> +				max_pass_len = pass_len;
> +				max_pass_start = pass_start;
> +			}
> +			pass_len = 0;
> +		}
> +	}

It seems pass_window is only used once in the later loop, why not
calculate and maintain the best window and its size on the fly? Then you
could get avoid of the pass_window buffer, and refactor a loop away.
Something like,

	int current_size, max_window, max_size;

	current_size = 0;
	max_size = 0;
	for (i = SPACEMIT_RX_TUNE_DELAY_MIN; i < SPACEMIT_RX_TUNE_DELAY_MAX;
	     i++) {
		ret = /* try tuning ... */

		if (ret) {
			if (max_size < current_size) {
				max_window = i - current_size;
				max_size = current_size;
			}

			current_size = 0;
		} else {
			current_size++;
		}
	}

	if (current_size > max_size) {
		max_window = i - current_size;
		max_size = current_size;
		current_size = 0;
	}

should work, too, and is simpler.

Regards,
Yao Zi

[PATCH v2 5/7] riscv: dts: spacemit: k1: add SD card controller and pinctrl support

[Iker Pedrosa]

Add SD card controller infrastructure for SpacemiT K1 SoC with complete
pinctrl support for both standard and UHS modes.

- Add sdhci0 controller definition with clocks, resets and interrupts
- Add mmc1_cfg pinctrl for 3.3V standard SD operation
- Add mmc1_uhs_cfg pinctrl for 1.8V UHS high-speed operation
- Configure appropriate drive strength and power-source properties

This provides complete SD card infrastructure that K1-based boards can
enable.

Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
---
 arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 40 ++++++++++++++++++++++++++++
 arch/riscv/boot/dts/spacemit/k1.dtsi         | 13 +++++++++
 2 files changed, 53 insertions(+)

diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
index b13dcb10f4d66022d27307de73a6ea3287e97441..8d82011f1af666fb78c282a2abcc0cb88f962053 100644
--- a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
@@ -570,4 +570,44 @@ pwm14-1-pins {
 			drive-strength = <32>;
 		};
 	};
+
+	mmc1_cfg: mmc1-cfg {
+		mmc1-data-cmd-pins {
+			pinmux = <K1_PADCONF(104, 0)>,   /* mmc1_d3 */
+				 <K1_PADCONF(105, 0)>,   /* mmc1_d2 */
+				 <K1_PADCONF(106, 0)>,   /* mmc1_d1 */
+				 <K1_PADCONF(107, 0)>,   /* mmc1_d0 */
+				 <K1_PADCONF(108, 0)>;   /* mmc1_cmd */
+			bias-pull-up = <1>;
+			drive-strength = <7>;
+			power-source = <3300>;
+		};
+
+		mmc1-clk-pins {
+			pinmux = <K1_PADCONF(109, 0)>;   /* mmc1_clk */
+			bias-pull-down = <1>;
+			drive-strength = <7>;
+			power-source = <3300>;
+		};
+	};
+
+	mmc1_uhs_cfg: mmc1-uhs-cfg {
+		mmc1-data-cmd-pins {
+			pinmux = <K1_PADCONF(104, 0)>,   /* mmc1_d3 */
+				 <K1_PADCONF(105, 0)>,   /* mmc1_d2 */
+				 <K1_PADCONF(106, 0)>,   /* mmc1_d1 */
+				 <K1_PADCONF(107, 0)>,   /* mmc1_d0 */
+				 <K1_PADCONF(108, 0)>;   /* mmc1_cmd */
+			bias-pull-up = <1>;
+			drive-strength = <13>;
+			power-source = <1800>;
+		};
+
+		mmc1-clk-pins {
+			pinmux = <K1_PADCONF(109, 0)>;   /* mmc1_clk */
+			bias-pull-down = <1>;
+			drive-strength = <13>;
+			power-source = <1800>;
+		};
+	};
 };
diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
index 529ec68e9c23eb2a93c04e9ccd3f22a01c4cc4ff..1e9e4f4f41c196326f20c0e5ae6721ea85ea5091 100644
--- a/arch/riscv/boot/dts/spacemit/k1.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
@@ -1207,6 +1207,19 @@ emmc: mmc@d4281000 {
 				interrupts = <101>;
 				status = "disabled";
 			};
+
+			sdhci0: mmc@d4280000 {
+				compatible = "spacemit,k1-sdhci";
+				reg = <0x0 0xd4280000 0x0 0x200>;
+				clocks = <&syscon_apmu CLK_SDH_AXI>,
+					 <&syscon_apmu CLK_SDH0>;
+				clock-names = "core", "io";
+				resets = <&syscon_apmu RESET_SDH_AXI>,
+					 <&syscon_apmu RESET_SDH0>;
+				reset-names = "axi", "sdh";
+				interrupts = <99>;
+				status = "disabled";
+			};
 		};
 	};
 };

-- 
2.53.0

[PATCH v2 6/7] riscv: dts: spacemit: k1-orangepi-rv2: add PMIC and power infrastructure

[Iker Pedrosa]

Add Spacemit P1 PMIC configuration and board power infrastructure for
voltage regulation support.

- Add board power regulators (12V input, 4V rail)
- Enable I2C8 for PMIC communication
- Configure PMIC with buck4 (vmmc) and aldo1 (vqmmc) regulators
- Set up regulator constraints for SD card operation

Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
---
 arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts | 48 ++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
index 7b7331cb3c726f11d597f81917f3a3f5fc21e1b9..414b03f5e6480f05f5d7eeaaa0afb4e86425ae36 100644
--- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
@@ -19,6 +19,25 @@ aliases {
 		ethernet1 = &eth1;
 	};
 
+	reg_dc_in: dc-in-12v {
+		compatible = "regulator-fixed";
+		regulator-name = "dc_in_12v";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	reg_vcc_4v: vcc-4v {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_4v";
+		regulator-min-microvolt = <4000000>;
+		regulator-max-microvolt = <4000000>;
+		regulator-boot-on;
+		regulator-always-on;
+		vin-supply = <&reg_dc_in>;
+	};
+
 	chosen {
 		stdout-path = "serial0";
 	};
@@ -92,3 +111,32 @@ &uart0 {
 	pinctrl-0 = <&uart0_2_cfg>;
 	status = "okay";
 };
+
+&i2c8 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c8_cfg>;
+	status = "okay";
+
+	pmic@41 {
+		compatible = "spacemit,p1";
+		reg = <0x41>;
+		interrupts = <64>;
+		vin-supply = <&reg_vcc_4v>;
+
+		regulators {
+			sd_vmmc: buck4 {
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-ramp-delay = <5000>;
+				regulator-always-on;
+			};
+
+			sd_vqmmc: aldo1 {
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+		};
+	};
+};

-- 
2.53.0

Re: [PATCH v2 6/7] riscv: dts: spacemit: k1-orangepi-rv2: add PMIC and power infrastructure

[Trevor Gamblin]

Hi,

On 2026-03-09 07:40, Iker Pedrosa wrote:
> Add Spacemit P1 PMIC configuration and board power infrastructure for
> voltage regulation support.
>
> - Add board power regulators (12V input, 4V rail)
> - Enable I2C8 for PMIC communication
> - Configure PMIC with buck4 (vmmc) and aldo1 (vqmmc) regulators
> - Set up regulator constraints for SD card operation
>
> Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
> ---
>   arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts | 48 ++++++++++++++++++++++++
>   1 file changed, 48 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> index 7b7331cb3c726f11d597f81917f3a3f5fc21e1b9..414b03f5e6480f05f5d7eeaaa0afb4e86425ae36 100644
> --- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> +++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> @@ -19,6 +19,25 @@ aliases {
>   		ethernet1 = &eth1;
>   	};
>   
> +	reg_dc_in: dc-in-12v {
> +		compatible = "regulator-fixed";
> +		regulator-name = "dc_in_12v";
> +		regulator-min-microvolt = <12000000>;
> +		regulator-max-microvolt = <12000000>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
Is this the correct voltage? I don't see a 12V rail in the RV2's 
datasheet, and the board's specifications only indicate a 5V USB-C input.
> +	reg_vcc_4v: vcc-4v {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vcc_4v";
> +		regulator-min-microvolt = <4000000>;
> +		regulator-max-microvolt = <4000000>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +		vin-supply = <&reg_dc_in>;
> +	};
> +
>   	chosen {
>   		stdout-path = "serial0";
>   	};
> @@ -92,3 +111,32 @@ &uart0 {
>   	pinctrl-0 = <&uart0_2_cfg>;
>   	status = "okay";
>   };
> +
> +&i2c8 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&i2c8_cfg>;
> +	status = "okay";
> +
> +	pmic@41 {
> +		compatible = "spacemit,p1";
> +		reg = <0x41>;
> +		interrupts = <64>;
> +		vin-supply = <&reg_vcc_4v>;
> +
> +		regulators {
> +			sd_vmmc: buck4 {
> +				regulator-min-microvolt = <500000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-ramp-delay = <5000>;
> +				regulator-always-on;
> +			};
> +
> +			sd_vqmmc: aldo1 {
> +				regulator-min-microvolt = <500000>;
> +				regulator-max-microvolt = <3400000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +			};
> +		};
> +	};
> +};
>

Re: [PATCH v2 6/7] riscv: dts: spacemit: k1-orangepi-rv2: add PMIC and power infrastructure

[Yixun Lan]

Hi Trevor, Iker,

On 14:27 Wed 11 Mar     , Trevor Gamblin wrote:
> Hi,
> 
> On 2026-03-09 07:40, Iker Pedrosa wrote:
> > Add Spacemit P1 PMIC configuration and board power infrastructure for
> > voltage regulation support.
> >
> > - Add board power regulators (12V input, 4V rail)
> > - Enable I2C8 for PMIC communication
> > - Configure PMIC with buck4 (vmmc) and aldo1 (vqmmc) regulators
> > - Set up regulator constraints for SD card operation
> >
> > Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
> > ---
> >   arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts | 48 ++++++++++++++++++++++++
> >   1 file changed, 48 insertions(+)
> >
> > diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> > index 7b7331cb3c726f11d597f81917f3a3f5fc21e1b9..414b03f5e6480f05f5d7eeaaa0afb4e86425ae36 100644
> > --- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> > +++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> > @@ -19,6 +19,25 @@ aliases {
> >   		ethernet1 = &eth1;
> >   	};
> >   
> > +	reg_dc_in: dc-in-12v {
> > +		compatible = "regulator-fixed";
> > +		regulator-name = "dc_in_12v";
> > +		regulator-min-microvolt = <12000000>;
> > +		regulator-max-microvolt = <12000000>;
> > +		regulator-boot-on;
> > +		regulator-always-on;
> > +	};
> > +
> Is this the correct voltage? I don't see a 12V rail in the RV2's 
> datasheet, and the board's specifications only indicate a 5V USB-C input.

Right, this should be fixed. Please note Han submitted one version of basic DT for rv2
which I think that series will go in first

https://lore.kernel.org/r/20260310161853.3900605-1-gaohan@iscas.ac.cn

> > +	reg_vcc_4v: vcc-4v {
> > +		compatible = "regulator-fixed";
> > +		regulator-name = "vcc_4v";
> > +		regulator-min-microvolt = <4000000>;
> > +		regulator-max-microvolt = <4000000>;
> > +		regulator-boot-on;
> > +		regulator-always-on;
> > +		vin-supply = <&reg_dc_in>;
> > +	};
> > +
> >   	chosen {
> >   		stdout-path = "serial0";
> >   	};
> > @@ -92,3 +111,32 @@ &uart0 {
> >   	pinctrl-0 = <&uart0_2_cfg>;
> >   	status = "okay";
> >   };
> > +
> > +&i2c8 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&i2c8_cfg>;
> > +	status = "okay";
> > +
> > +	pmic@41 {
> > +		compatible = "spacemit,p1";
> > +		reg = <0x41>;
> > +		interrupts = <64>;
> > +		vin-supply = <&reg_vcc_4v>;
> > +
> > +		regulators {
> > +			sd_vmmc: buck4 {
I'd suggest name it more generic and add a comment where device reference to it,
since buck4 requested by more than one devices, will make people less confused.
something just like:
			buck4: buck4 {

> > +				regulator-min-microvolt = <500000>;
> > +				regulator-max-microvolt = <3300000>;
> > +				regulator-ramp-delay = <5000>;
> > +				regulator-always-on;
> > +			};
> > +
> > +			sd_vqmmc: aldo1 {
> > +				regulator-min-microvolt = <500000>;
> > +				regulator-max-microvolt = <3400000>;
> > +				regulator-boot-on;
> > +				regulator-always-on;
> > +			};
> > +		};
> > +	};
> > +};
> >
> 

-- 
Yixun Lan (dlan)

Re: [PATCH v2 6/7] riscv: dts: spacemit: k1-orangepi-rv2: add PMIC and power infrastructure

[Iker Pedrosa]

El vie, 13 mar 2026 a las 1:19, Yixun Lan (<dlan@kernel.org>) escribió:
>
> Hi Trevor, Iker,
>
> On 14:27 Wed 11 Mar     , Trevor Gamblin wrote:
> > Hi,
> >
> > On 2026-03-09 07:40, Iker Pedrosa wrote:
> > > Add Spacemit P1 PMIC configuration and board power infrastructure for
> > > voltage regulation support.
> > >
> > > - Add board power regulators (12V input, 4V rail)
> > > - Enable I2C8 for PMIC communication
> > > - Configure PMIC with buck4 (vmmc) and aldo1 (vqmmc) regulators
> > > - Set up regulator constraints for SD card operation
> > >
> > > Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
> > > ---
> > >   arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts | 48 ++++++++++++++++++++++++
> > >   1 file changed, 48 insertions(+)
> > >
> > > diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> > > index 7b7331cb3c726f11d597f81917f3a3f5fc21e1b9..414b03f5e6480f05f5d7eeaaa0afb4e86425ae36 100644
> > > --- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> > > +++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> > > @@ -19,6 +19,25 @@ aliases {
> > >             ethernet1 = &eth1;
> > >     };
> > >
> > > +   reg_dc_in: dc-in-12v {
> > > +           compatible = "regulator-fixed";
> > > +           regulator-name = "dc_in_12v";
> > > +           regulator-min-microvolt = <12000000>;
> > > +           regulator-max-microvolt = <12000000>;
> > > +           regulator-boot-on;
> > > +           regulator-always-on;
> > > +   };
> > > +
> > Is this the correct voltage? I don't see a 12V rail in the RV2's
> > datasheet, and the board's specifications only indicate a 5V USB-C input.
>
> Right, this should be fixed. Please note Han submitted one version of basic DT for rv2
> which I think that series will go in first
>
> https://lore.kernel.org/r/20260310161853.3900605-1-gaohan@iscas.ac.cn
>

I'm fine with that. Do we have an estimate of when these changes will
land? I'm fine with rebasing once those are merged, but I'd like to
continue with the review for the remaining changes in this patch
series and I'm unsure on how to proceed.

> > > +   reg_vcc_4v: vcc-4v {
> > > +           compatible = "regulator-fixed";
> > > +           regulator-name = "vcc_4v";
> > > +           regulator-min-microvolt = <4000000>;
> > > +           regulator-max-microvolt = <4000000>;
> > > +           regulator-boot-on;
> > > +           regulator-always-on;
> > > +           vin-supply = <&reg_dc_in>;
> > > +   };
> > > +
> > >     chosen {
> > >             stdout-path = "serial0";
> > >     };
> > > @@ -92,3 +111,32 @@ &uart0 {
> > >     pinctrl-0 = <&uart0_2_cfg>;
> > >     status = "okay";
> > >   };
> > > +
> > > +&i2c8 {
> > > +   pinctrl-names = "default";
> > > +   pinctrl-0 = <&i2c8_cfg>;
> > > +   status = "okay";
> > > +
> > > +   pmic@41 {
> > > +           compatible = "spacemit,p1";
> > > +           reg = <0x41>;
> > > +           interrupts = <64>;
> > > +           vin-supply = <&reg_vcc_4v>;
> > > +
> > > +           regulators {
> > > +                   sd_vmmc: buck4 {
> I'd suggest name it more generic and add a comment where device reference to it,
> since buck4 requested by more than one devices, will make people less confused.
> something just like:
>                         buck4: buck4 {
>
> > > +                           regulator-min-microvolt = <500000>;
> > > +                           regulator-max-microvolt = <3300000>;
> > > +                           regulator-ramp-delay = <5000>;
> > > +                           regulator-always-on;
> > > +                   };
> > > +
> > > +                   sd_vqmmc: aldo1 {
> > > +                           regulator-min-microvolt = <500000>;
> > > +                           regulator-max-microvolt = <3400000>;
> > > +                           regulator-boot-on;
> > > +                           regulator-always-on;
> > > +                   };
> > > +           };
> > > +   };
> > > +};
> > >
> >
>
> --
> Yixun Lan (dlan)

Re: [PATCH v2 6/7] riscv: dts: spacemit: k1-orangepi-rv2: add PMIC and power infrastructure

[Yixun Lan]

Hi Iker,

On 10:42 Fri 13 Mar     , Iker Pedrosa wrote:
> El vie, 13 mar 2026 a las 1:19, Yixun Lan (<dlan@kernel.org>) escribió:
> >
> > Hi Trevor, Iker,
> >
> > On 14:27 Wed 11 Mar     , Trevor Gamblin wrote:
> > > Hi,
> > >
> > > On 2026-03-09 07:40, Iker Pedrosa wrote:
> > > > Add Spacemit P1 PMIC configuration and board power infrastructure for
> > > > voltage regulation support.
> > > >
> > > > - Add board power regulators (12V input, 4V rail)
> > > > - Enable I2C8 for PMIC communication
> > > > - Configure PMIC with buck4 (vmmc) and aldo1 (vqmmc) regulators
> > > > - Set up regulator constraints for SD card operation
> > > >
> > > > Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
> > > > ---
> > > >   arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts | 48 ++++++++++++++++++++++++
> > > >   1 file changed, 48 insertions(+)
> > > >
> > > > diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> > > > index 7b7331cb3c726f11d597f81917f3a3f5fc21e1b9..414b03f5e6480f05f5d7eeaaa0afb4e86425ae36 100644
> > > > --- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> > > > +++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> > > > @@ -19,6 +19,25 @@ aliases {
> > > >             ethernet1 = &eth1;
> > > >     };
> > > >
> > > > +   reg_dc_in: dc-in-12v {
> > > > +           compatible = "regulator-fixed";
> > > > +           regulator-name = "dc_in_12v";
> > > > +           regulator-min-microvolt = <12000000>;
> > > > +           regulator-max-microvolt = <12000000>;
> > > > +           regulator-boot-on;
> > > > +           regulator-always-on;
> > > > +   };
> > > > +
> > > Is this the correct voltage? I don't see a 12V rail in the RV2's
> > > datasheet, and the board's specifications only indicate a 5V USB-C input.
> >
> > Right, this should be fixed. Please note Han submitted one version of basic DT for rv2
> > which I think that series will go in first
> >
> > https://lore.kernel.org/r/20260310161853.3900605-1-gaohan@iscas.ac.cn
> >
> 
> I'm fine with that. Do we have an estimate of when these changes will
> land? I'm fine with rebasing once those are merged, but I'd like to
> continue with the review for the remaining changes in this patch
> series and I'm unsure on how to proceed.
> 
For that changes, likely will target v7.1 merge window

You can continue with current version, once that happen, you can rebase ..

-- 
Yixun Lan (dlan)

Re: [PATCH v2 6/7] riscv: dts: spacemit: k1-orangepi-rv2: add PMIC and power infrastructure

[Iker Pedrosa]

El vie, 13 mar 2026 a las 12:11, Yixun Lan (<dlan@kernel.org>) escribió:
>
> Hi Iker,
>
> On 10:42 Fri 13 Mar     , Iker Pedrosa wrote:
> > El vie, 13 mar 2026 a las 1:19, Yixun Lan (<dlan@kernel.org>) escribió:
> > >
> > > Hi Trevor, Iker,
> > >
> > > On 14:27 Wed 11 Mar     , Trevor Gamblin wrote:
> > > > Hi,
> > > >
> > > > On 2026-03-09 07:40, Iker Pedrosa wrote:
> > > > > Add Spacemit P1 PMIC configuration and board power infrastructure for
> > > > > voltage regulation support.
> > > > >
> > > > > - Add board power regulators (12V input, 4V rail)
> > > > > - Enable I2C8 for PMIC communication
> > > > > - Configure PMIC with buck4 (vmmc) and aldo1 (vqmmc) regulators
> > > > > - Set up regulator constraints for SD card operation
> > > > >
> > > > > Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
> > > > > ---
> > > > >   arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts | 48 ++++++++++++++++++++++++
> > > > >   1 file changed, 48 insertions(+)
> > > > >
> > > > > diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> > > > > index 7b7331cb3c726f11d597f81917f3a3f5fc21e1b9..414b03f5e6480f05f5d7eeaaa0afb4e86425ae36 100644
> > > > > --- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> > > > > +++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> > > > > @@ -19,6 +19,25 @@ aliases {
> > > > >             ethernet1 = &eth1;
> > > > >     };
> > > > >
> > > > > +   reg_dc_in: dc-in-12v {
> > > > > +           compatible = "regulator-fixed";
> > > > > +           regulator-name = "dc_in_12v";
> > > > > +           regulator-min-microvolt = <12000000>;
> > > > > +           regulator-max-microvolt = <12000000>;
> > > > > +           regulator-boot-on;
> > > > > +           regulator-always-on;
> > > > > +   };
> > > > > +
> > > > Is this the correct voltage? I don't see a 12V rail in the RV2's
> > > > datasheet, and the board's specifications only indicate a 5V USB-C input.
> > >
> > > Right, this should be fixed. Please note Han submitted one version of basic DT for rv2
> > > which I think that series will go in first
> > >
> > > https://lore.kernel.org/r/20260310161853.3900605-1-gaohan@iscas.ac.cn
> > >
> >
> > I'm fine with that. Do we have an estimate of when these changes will
> > land? I'm fine with rebasing once those are merged, but I'd like to
> > continue with the review for the remaining changes in this patch
> > series and I'm unsure on how to proceed.
> >
> For that changes, likely will target v7.1 merge window
>
> You can continue with current version, once that happen, you can rebase ..

Ok, that sounds good to me

>
> --
> Yixun Lan (dlan)

[PATCH v2 7/7] riscv: dts: spacemit: k1-orangepi-rv2: add SD card support with UHS modes

[Iker Pedrosa]

Add complete SD card controller support with UHS high-speed modes.

- Enable sdhci0 controller with 4-bit bus width
- Configure card detect GPIO with inversion
- Connect vmmc-supply to buck4 for 3.3V card power
- Connect vqmmc-supply to aldo1 for 1.8V/3.3V I/O switching
- Add dual pinctrl states for voltage-dependent pin configuration
- Support UHS-I SDR25, SDR50, and SDR104 modes

This enables full SD card functionality including high-speed UHS modes
for improved performance.

Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
---
 arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
index 414b03f5e6480f05f5d7eeaaa0afb4e86425ae36..361135269801f436703b6f1d768c91325a52f07f 100644
--- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
@@ -140,3 +140,22 @@ sd_vqmmc: aldo1 {
 		};
 	};
 };
+
+&sdhci0 {
+	pinctrl-names = "default", "state_uhs";
+	pinctrl-0 = <&mmc1_cfg>;
+	pinctrl-1 = <&mmc1_uhs_cfg>;
+	bus-width = <4>;
+	cd-gpios = <&gpio K1_GPIO(80) GPIO_ACTIVE_HIGH>;
+	cd-inverted;
+	no-mmc;
+	no-sdio;
+	disable-wp;
+	cap-sd-highspeed;
+	vmmc-supply = <&sd_vmmc>;
+	vqmmc-supply = <&sd_vqmmc>;
+	sd-uhs-sdr25;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
+	status = "okay";
+};

-- 
2.53.0

Re: [PATCH v2 7/7] riscv: dts: spacemit: k1-orangepi-rv2: add SD card support with UHS modes

[Anand Moon]

Hi Iker,

On Mon, 9 Mar 2026 at 17:11, Iker Pedrosa <ikerpedrosam@gmail.com> wrote:
>
> Add complete SD card controller support with UHS high-speed modes.
>
> - Enable sdhci0 controller with 4-bit bus width
> - Configure card detect GPIO with inversion
> - Connect vmmc-supply to buck4 for 3.3V card power
> - Connect vqmmc-supply to aldo1 for 1.8V/3.3V I/O switching
> - Add dual pinctrl states for voltage-dependent pin configuration
> - Support UHS-I SDR25, SDR50, and SDR104 modes
>
> This enables full SD card functionality including high-speed UHS modes
> for improved performance.
>
> Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>

Can you add the same node for k1-bananapi-f3.dts in the next version?

Thanks
-Anand

Re: [PATCH v2 7/7] riscv: dts: spacemit: k1-orangepi-rv2: add SD card support with UHS modes

[Trevor Gamblin]

On 2026-03-09 07:40, Iker Pedrosa wrote:
> Add complete SD card controller support with UHS high-speed modes.
>
> - Enable sdhci0 controller with 4-bit bus width
> - Configure card detect GPIO with inversion
> - Connect vmmc-supply to buck4 for 3.3V card power
> - Connect vqmmc-supply to aldo1 for 1.8V/3.3V I/O switching
> - Add dual pinctrl states for voltage-dependent pin configuration
> - Support UHS-I SDR25, SDR50, and SDR104 modes
>
> This enables full SD card functionality including high-speed UHS modes
> for improved performance.
>
> Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
> ---
>   arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts | 19 +++++++++++++++++++
>   1 file changed, 19 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> index 414b03f5e6480f05f5d7eeaaa0afb4e86425ae36..361135269801f436703b6f1d768c91325a52f07f 100644
> --- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> +++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> @@ -140,3 +140,22 @@ sd_vqmmc: aldo1 {
>   		};
>   	};
>   };
> +
> +&sdhci0 {
> +	pinctrl-names = "default", "state_uhs";
> +	pinctrl-0 = <&mmc1_cfg>;
> +	pinctrl-1 = <&mmc1_uhs_cfg>;
> +	bus-width = <4>;
> +	cd-gpios = <&gpio K1_GPIO(80) GPIO_ACTIVE_HIGH>;
> +	cd-inverted;
> +	no-mmc;
> +	no-sdio;
> +	disable-wp;
> +	cap-sd-highspeed;
> +	vmmc-supply = <&sd_vmmc>;
> +	vqmmc-supply = <&sd_vqmmc>;
> +	sd-uhs-sdr25;
> +	sd-uhs-sdr50;
> +	sd-uhs-sdr104;
> +	status = "okay";
> +};
>
Hello again,

Thanks for doing this work. My colleagues and I have been testing this 
on an OrangePi RV2, and also a Muse Pi Pro board (making a similar tweak 
to this patch in k1-musepi-pro.dts). To do the testing on my end, I'm 
applying the patch series on top of 6.19 in a Yocto BSP.

I've been finding that I see issues with the UHS support on my side 
(this log comes from an image built and flashed to an SD card):


[ 1.072417] sdhci-spacemit d4280000.mmc: Got CD GPIO
[ 1.109741] mmc0: SDHCI controller on d4280000.mmc [d4280000.mmc] using 
ADMA
[ 1.114589] clk: Disabling unused clocks
[ 1.118421] PM: genpd: Disabling unused power domains
[ 1.123249] ALSA device list:
[ 1.126[ 1.129949] check access for rdinit=/init failed: -2, ignoring
[ 1.133284] Waiting for root device 
PARTUUID=e94bfdd7-a36f-4315-a480-476e2a12403d...
[ 1.176569] mmc0: new UHS-I speed DDR50 SDHC card at address aaaa
[ 1.180732] mmcblk0: mmc0:aaaa SS16G 14.8 GiB
[ 1.276268] mmcblk0: recovery failed!
[ 1.277351] I/O error, dev mmcblk0, sector 0 op 0x0:(READ) flags 
0x800000 phys_seg 1 prio class 2
[ 1.286346] Buffer I/O error on dev mmcblk0, logical block 0, async page 
read
[ 1.293891] mmcblk0: recovery failed!
[ 1.297289] I/O error, dev mmcblk0, sector 0 op 0x0:(READ) flags 
0x800000 phys_seg 1 prio class 2
[ 1.306269] Buffer I/O error on dev mmcblk0, logical block 0, async page 
read
[ 1.313522] mmcblk0: unable to read partition table


At first I wondered if maybe there was an issue with the card itself, 
but by changing the sdhci0 section to this, I'm able to read the SD just 
fine:

&sdhci0 {
          pinctrl-names = "default";
          pinctrl-0 = <&mmc1_cfg>;
          bus-width = <4>;
          cd-gpios = <&gpio K1_GPIO(80) GPIO_ACTIVE_HIGH>;
          cd-inverted;
          no-mmc;
          no-sdio;
          disable-wp;
          vmmc-supply = <&sd_vmmc>;
          vqmmc-supply = <&sd_vqmmc>;
          no-1-8-v;
          status = "okay";
};

Here's the boot log, for comparison:

[    1.068399] sdhci-spacemit d4280000.mmc: Got CD GPIO
[    1.105952] mmc0: SDHCI controller on d4280000.mmc [d4280000.mmc] 
using ADMA
[    1.110807] clk: Disabling unused clocks
[    1.114624] PM: genpd: Disabling unused power domains
[    1.119456] ALSA device list:
[    1.122[    1.126159] check access for rdinit=/init failed: -2, ignoring
[    1.129491] Waiting for root device 
PARTUUID=e94bfdd7-a36f-4315-a480-476e2a12403d...
[    1.155817] mmc0: new high speed SDHC card at address aaaa
[    1.159367] mmcblk0: mmc0:aaaa SS16G 14.8 GiB
[    1.173666] GPT:Primary header thinks Alt. header is not at the end 
of the disk.
[    1.178530] GPT:1135739 != 31116287
[    1.182045] GPT:Alternate GPT header not at the end of the disk.
[    1.188124] GPT:1135739 != 31116287
[    1.191650] GPT: Use GNU Parted to correct GPT errors.
[    1.196894]  mmcblk0: p1 p2 p3
[    1.375482] EXT4-fs (mmcblk0p3): recovery complete
[    1.379459] EXT4-fs (mmcblk0p3): mounted filesystem 
ad761819-1030-44fe-9267-f59c53c4b5c4 r/w with ordered data mode. Quota 
mode: disabled.
[    1.390400] VFS: Mounted root (ext4 filesystem) on device 179:3.


To be sure, I tried a different SDXC card with your version and saw:


[    1.064528] sdhci-spacemit d4280000.mmc: Got CD GPIO
[    1.102113] mmc0: SDHCI controller on d4280000.mmc [d4280000.mmc] 
using ADMA
[    1.106978] clk: Disabling unused clocks
[    1.110792] PM: genpd: Disabling unused power domains
[    1.115622] ALSA device list:
[    1.118[    1.122325] check access for rdinit=/init failed: -2, ignoring
[    1.125656] Waiting for root device 
PARTUUID=e94bfdd7-a36f-4315-a480-476e2a12403d...
[    1.215840] sdhci-spacemit d4280000.mmc: Tuning failed: no stable 
window found
[    1.220520] mmc0: tuning execution failed: -5
[    1.224931] mmc0: error -5 whilst initialising SD card
[    1.378228] sdhci-spacemit d4280000.mmc: Tuning failed: no stable 
window found
[    1.382901] mmc0: tuning execution failed: -5
[    1.506443] mmc0: new high speed SDXC card at address 1388
[    1.510009] mmcblk0: mmc0:1388 SATC 57.7 GiB
[    1.645467] sdhci-spacemit d4280000.mmc: Tuning failed: no stable 
window found
[    1.650158] mmc0: tuning execution failed: -5
[    1.772856] GPT:Primary header thinks Alt. header is not at the end 
of the disk.
[    1.777718] GPT:1135725 != 120930303
[    1.781317] GPT:Alternate GPT header not at the end of the disk.
[    1.787397] GPT:1135725 != 120930303
[    1.791022] GPT: Use GNU Parted to correct GPT errors.
[    1.796238]  mmcblk0: p1 p2 p3
[    1.917789] sdhci-spacemit d4280000.mmc: Tuning failed: no stable 
window found
[    1.922483] mmc0: tuning execution failed: -5
[    2.174518] sdhci-spacemit d4280000.mmc: Tuning failed: no stable 
window found
[    2.179193] mmc0: tuning execution failed: -5
[    2.337900] EXT4-fs (mmcblk0p3): mounted filesystem 
d1f9e739-cc74-4c48-a774-390717721c53 r/w with ordered data mode. Quota 
mode: disabled.
[    2.348031] VFS: Mounted root (ext4 filesystem) on device 179:3.
[    2.492089] sdhci-spacemit d4280000.mmc: Tuning failed: no stable 
window found
[    2.496771] mmc0: tuning execution failed: -5
[    2.617641] devtmpfs: mounted
[    2.618771] Freeing unused kernel image (initmem) memory: 2432K
[    2.624085] Run /sbin/init as init process
[    2.749813] sdhci-spacemit d4280000.mmc: Tuning failed: no stable 
window found
[    2.754492] mmc0: tuning execution failed: -5
[    3.013665] sdhci-spacemit d4280000.mmc: Tuning failed: no stable 
window found
[    3.018357] mmc0: tuning execution failed: -5
[    3.279459] sdhci-spacemit d4280000.mmc: Tuning failed: no stable 
window found
[    3.284139] mmc0: tuning execution failed: -5
[    3.541764] sdhci-spacemit d4280000.mmc: Tuning failed: no stable 
window found
[    3.546450] mmc0: tuning execution failed: -5
[    3.665967] I/O error, dev mmcblk0, sector 259162 op 0x0:(READ) flags 
0x880700 phys_seg 1 prio class 2
[    3.672894] I/O error, dev mmcblk0, sector 259163 op 0x0:(READ) flags 
0x880700 phys_seg 1 prio class 2
[    3.683275] I/O error, dev mmcblk0, sector 259170 op 0x0:(READ) flags 
0x880700 phys_seg 1 prio class 2
[    3.691878] I/O error, dev mmcblk0, sector 259172 op 0x0:(READ) flags 
0x880700 phys_seg 1 prio class 2
[    3.701516] I/O error, dev mmcblk0, sector 259175 op 0x0:(READ) flags 
0x880700 phys_seg 1 prio class 2
[    3.711067] I/O error, dev mmcblk0, sector 259178 op 0x0:(READ) flags 
0x880700 phys_seg 1 prio class 2
[    3.720183] I/O error, dev mmcblk0, sector 259180 op 0x0:(READ) flags 
0x880700 phys_seg 1 prio class 2
[    3.730004] I/O error, dev mmcblk0, sector 259183 op 0x0:(READ) flags 
0x880700 phys_seg 1 prio class 2
[    3.739010] I/O error, dev mmcblk0, sector 259184 op 0x0:(READ) flags 
0x880700 phys_seg 1 prio class 2
[    3.888355] sdhci-spacemit d4280000.mmc: Tuning failed: no stable 
window found
[    3.893045] mmc0: tuning execution failed: -5
[    4.149999] sdhci-spacemit d4280000.mmc: Tuning failed: no stable 
window found
[    4.154686] mmc0: tuning execution failed: -5
[    4.283933] I/O error, dev mmcblk0, sector 209865 op 0x0:(READ) flags 
0x803000 phys_seg 1 prio class 2
[    4.290750] EXT4-fs warning (device mmcblk0p3): 
ext4_dx_find_entry:1726: inode #768: lblock 1: comm swapper/0: error -5 
reading directory block
[    4.303879] Starting init: /sbin/init exists but couldn't execute it 
(error -5)
[    4.311194] Run /etc/init as init process
[    4.316220] Run /bin/init as init process
[    4.319996] Run /bin/sh as init process
[    4.457522] sdhci-spacemit d4280000.mmc: Tuning failed: no stable 
window found
[    4.462200] mmc0: tuning execution failed: -5
[    4.719271] sdhci-spacemit d4280000.mmc: Tuning failed: no stable 
window found
[    4.723945] mmc0: tuning execution failed: -5
[    4.842487] EXT4-fs warning (device mmcblk0p3): 
ext4_dx_find_entry:1726: inode #768: lblock 1: comm swapper/0: error -5 
reading directory block
[    4.852959] Starting init: /bin/sh exists but couldn't execute it 
(error -5)
[    4.860044] Kernel panic - not syncing: No working init found.  Try 
passing init= option to kernel. See Linux 
Documentation/admin-guide/init.rst for guidance.
[    4.874394] CPU: 4 UID: 0 PID: 1 Comm: swapper/0 Not tainted 
6.19.0-00008-ga23b3fad2d87 #1 NONE
[    4.883295] Hardware name: OrangePi RV2 (DT)


I don't think I've missed anything between 6.19 and 7.x, but it's 
possible. It seems like there's a timing issue at play?

Let me know if I can help with further testing. I'm also in #spacemit on 
IRC.

Re: [PATCH v2 7/7] riscv: dts: spacemit: k1-orangepi-rv2: add SD card support with UHS modes

[Anand Moon]

Hi Trevor,

On Fri, 13 Mar 2026 at 19:26, Trevor Gamblin <tgamblin@baylibre.com> wrote:
>
>
> On 2026-03-09 07:40, Iker Pedrosa wrote:
> > Add complete SD card controller support with UHS high-speed modes.
> >
> > - Enable sdhci0 controller with 4-bit bus width
> > - Configure card detect GPIO with inversion
> > - Connect vmmc-supply to buck4 for 3.3V card power
> > - Connect vqmmc-supply to aldo1 for 1.8V/3.3V I/O switching
> > - Add dual pinctrl states for voltage-dependent pin configuration
> > - Support UHS-I SDR25, SDR50, and SDR104 modes
> >
> > This enables full SD card functionality including high-speed UHS modes
> > for improved performance.
> >
> > Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
> > ---
> >   arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts | 19 +++++++++++++++++++
> >   1 file changed, 19 insertions(+)
> >
> > diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> > index 414b03f5e6480f05f5d7eeaaa0afb4e86425ae36..361135269801f436703b6f1d768c91325a52f07f 100644
> > --- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> > +++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> > @@ -140,3 +140,22 @@ sd_vqmmc: aldo1 {
> >               };
> >       };
> >   };
> > +
> > +&sdhci0 {
> > +     pinctrl-names = "default", "state_uhs";
> > +     pinctrl-0 = <&mmc1_cfg>;
> > +     pinctrl-1 = <&mmc1_uhs_cfg>;
> > +     bus-width = <4>;
> > +     cd-gpios = <&gpio K1_GPIO(80) GPIO_ACTIVE_HIGH>;
> > +     cd-inverted;
> > +     no-mmc;
> > +     no-sdio;
> > +     disable-wp;
> > +     cap-sd-highspeed;
> > +     vmmc-supply = <&sd_vmmc>;
> > +     vqmmc-supply = <&sd_vqmmc>;
> > +     sd-uhs-sdr25;
> > +     sd-uhs-sdr50;
> > +     sd-uhs-sdr104;
> > +     status = "okay";
> > +};
> >
> Hello again,
>
> Thanks for doing this work. My colleagues and I have been testing this
> on an OrangePi RV2, and also a Muse Pi Pro board (making a similar tweak
> to this patch in k1-musepi-pro.dts). To do the testing on my end, I'm
> applying the patch series on top of 6.19 in a Yocto BSP.
>
> I've been finding that I see issues with the UHS support on my side
> (this log comes from an image built and flashed to an SD card):
>
>
> [ 1.072417] sdhci-spacemit d4280000.mmc: Got CD GPIO
> [ 1.109741] mmc0: SDHCI controller on d4280000.mmc [d4280000.mmc] using
> ADMA
> [ 1.114589] clk: Disabling unused clocks
> [ 1.118421] PM: genpd: Disabling unused power domains
> [ 1.123249] ALSA device list:
> [ 1.126[ 1.129949] check access for rdinit=/init failed: -2, ignoring
> [ 1.133284] Waiting for root device
> PARTUUID=e94bfdd7-a36f-4315-a480-476e2a12403d...
> [ 1.176569] mmc0: new UHS-I speed DDR50 SDHC card at address aaaa
> [ 1.180732] mmcblk0: mmc0:aaaa SS16G 14.8 GiB
> [ 1.276268] mmcblk0: recovery failed!
> [ 1.277351] I/O error, dev mmcblk0, sector 0 op 0x0:(READ) flags
> 0x800000 phys_seg 1 prio class 2
> [ 1.286346] Buffer I/O error on dev mmcblk0, logical block 0, async page
> read
> [ 1.293891] mmcblk0: recovery failed!
> [ 1.297289] I/O error, dev mmcblk0, sector 0 op 0x0:(READ) flags
> 0x800000 phys_seg 1 prio class 2
> [ 1.306269] Buffer I/O error on dev mmcblk0, logical block 0, async page
> read
> [ 1.313522] mmcblk0: unable to read partition table
>
>
> At first I wondered if maybe there was an issue with the card itself,
> but by changing the sdhci0 section to this, I'm able to read the SD just
> fine:
>
I used the same example on the K1-OrangePi-RV2 DTS,
But it’s slightly different from the one you’re working with.
I tested on the latest  7.0-rc3.

> &sdhci0 {
>           pinctrl-names = "default";
>           pinctrl-0 = <&mmc1_cfg>;
>           bus-width = <4>;
>           cd-gpios = <&gpio K1_GPIO(80) GPIO_ACTIVE_HIGH>;
>           cd-inverted;
>           no-mmc;
>           no-sdio;
>           disable-wp;
>           vmmc-supply = <&sd_vmmc>;
>           vqmmc-supply = <&sd_vqmmc>;
>           no-1-8-v;
>           status = "okay";
> };
>
+
+&sdhci0 {
+       pinctrl-names = "default", "state_uhs";
+       pinctrl-0 = <&mmc1_cfg>;
+       pinctrl-1 = <&mmc1_uhs_cfg>;
+       bus-width = <4>;
+       cd-gpios = <&gpio K1_GPIO(80) GPIO_ACTIVE_HIGH>;
+       cd-inverted;
+       no-mmc;
+       no-sdio;
+       disable-wp;
+       cap-sd-highspeed;
+       vmmc-supply = <&sd_vmmc>;
+       vqmmc-supply = <&sd_vqmmc>;
+       sd-uhs-sdr25;
+       sd-uhs-sdr50;
+       sd-uhs-sdr104;
+       status = "okay";
+};

Thanks
-Anand

Re: [PATCH v2 7/7] riscv: dts: spacemit: k1-orangepi-rv2: add SD card support with UHS modes

[Trevor Gamblin]

On 2026-03-13 10:42, Anand Moon wrote:
> Hi Trevor,
>
> On Fri, 13 Mar 2026 at 19:26, Trevor Gamblin<tgamblin@baylibre.com> wrote:
>> On 2026-03-09 07:40, Iker Pedrosa wrote:
>>> Add complete SD card controller support with UHS high-speed modes.
>>>
>>> - Enable sdhci0 controller with 4-bit bus width
>>> - Configure card detect GPIO with inversion
>>> - Connect vmmc-supply to buck4 for 3.3V card power
>>> - Connect vqmmc-supply to aldo1 for 1.8V/3.3V I/O switching
>>> - Add dual pinctrl states for voltage-dependent pin configuration
>>> - Support UHS-I SDR25, SDR50, and SDR104 modes
>>>
>>> This enables full SD card functionality including high-speed UHS modes
>>> for improved performance.
>>>
>>> Signed-off-by: Iker Pedrosa<ikerpedrosam@gmail.com>
>>> ---
>>>    arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts | 19 +++++++++++++++++++
>>>    1 file changed, 19 insertions(+)
>>>
>>> diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
>>> index 414b03f5e6480f05f5d7eeaaa0afb4e86425ae36..361135269801f436703b6f1d768c91325a52f07f 100644
>>> --- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
>>> +++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
>>> @@ -140,3 +140,22 @@ sd_vqmmc: aldo1 {
>>>                };
>>>        };
>>>    };
>>> +
>>> +&sdhci0 {
>>> +     pinctrl-names = "default", "state_uhs";
>>> +     pinctrl-0 = <&mmc1_cfg>;
>>> +     pinctrl-1 = <&mmc1_uhs_cfg>;
>>> +     bus-width = <4>;
>>> +     cd-gpios = <&gpio K1_GPIO(80) GPIO_ACTIVE_HIGH>;
>>> +     cd-inverted;
>>> +     no-mmc;
>>> +     no-sdio;
>>> +     disable-wp;
>>> +     cap-sd-highspeed;
>>> +     vmmc-supply = <&sd_vmmc>;
>>> +     vqmmc-supply = <&sd_vqmmc>;
>>> +     sd-uhs-sdr25;
>>> +     sd-uhs-sdr50;
>>> +     sd-uhs-sdr104;
>>> +     status = "okay";
>>> +};
>>>
>> Hello again,
>>
>> Thanks for doing this work. My colleagues and I have been testing this
>> on an OrangePi RV2, and also a Muse Pi Pro board (making a similar tweak
>> to this patch in k1-musepi-pro.dts). To do the testing on my end, I'm
>> applying the patch series on top of 6.19 in a Yocto BSP.
>>
>> I've been finding that I see issues with the UHS support on my side
>> (this log comes from an image built and flashed to an SD card):
>>
>>
>> [ 1.072417] sdhci-spacemit d4280000.mmc: Got CD GPIO
>> [ 1.109741] mmc0: SDHCI controller on d4280000.mmc [d4280000.mmc] using
>> ADMA
>> [ 1.114589] clk: Disabling unused clocks
>> [ 1.118421] PM: genpd: Disabling unused power domains
>> [ 1.123249] ALSA device list:
>> [ 1.126[ 1.129949] check access for rdinit=/init failed: -2, ignoring
>> [ 1.133284] Waiting for root device
>> PARTUUID=e94bfdd7-a36f-4315-a480-476e2a12403d...
>> [ 1.176569] mmc0: new UHS-I speed DDR50 SDHC card at address aaaa
>> [ 1.180732] mmcblk0: mmc0:aaaa SS16G 14.8 GiB
>> [ 1.276268] mmcblk0: recovery failed!
>> [ 1.277351] I/O error, dev mmcblk0, sector 0 op 0x0:(READ) flags
>> 0x800000 phys_seg 1 prio class 2
>> [ 1.286346] Buffer I/O error on dev mmcblk0, logical block 0, async page
>> read
>> [ 1.293891] mmcblk0: recovery failed!
>> [ 1.297289] I/O error, dev mmcblk0, sector 0 op 0x0:(READ) flags
>> 0x800000 phys_seg 1 prio class 2
>> [ 1.306269] Buffer I/O error on dev mmcblk0, logical block 0, async page
>> read
>> [ 1.313522] mmcblk0: unable to read partition table
>>
>>
>> At first I wondered if maybe there was an issue with the card itself,
>> but by changing the sdhci0 section to this, I'm able to read the SD just
>> fine:
>>
> I used the same example on the K1-OrangePi-RV2 DTS,
> But it’s slightly different from the one you’re working with.
> I tested on the latest  7.0-rc3.
>
>> &sdhci0 {
>>            pinctrl-names = "default";
>>            pinctrl-0 = <&mmc1_cfg>;
>>            bus-width = <4>;
>>            cd-gpios = <&gpio K1_GPIO(80) GPIO_ACTIVE_HIGH>;
>>            cd-inverted;
>>            no-mmc;
>>            no-sdio;
>>            disable-wp;
>>            vmmc-supply = <&sd_vmmc>;
>>            vqmmc-supply = <&sd_vqmmc>;
>>            no-1-8-v;
>>            status = "okay";
>> };
>>
> +
> +&sdhci0 {
> +       pinctrl-names = "default", "state_uhs";
> +       pinctrl-0 = <&mmc1_cfg>;
> +       pinctrl-1 = <&mmc1_uhs_cfg>;
> +       bus-width = <4>;
> +       cd-gpios = <&gpio K1_GPIO(80) GPIO_ACTIVE_HIGH>;
> +       cd-inverted;
> +       no-mmc;
> +       no-sdio;
> +       disable-wp;
> +       cap-sd-highspeed;
> +       vmmc-supply = <&sd_vmmc>;
> +       vqmmc-supply = <&sd_vqmmc>;
> +       sd-uhs-sdr25;
> +       sd-uhs-sdr50;
> +       sd-uhs-sdr104;
> +       status = "okay";
> +};
>
> Thanks
> -Anand
Yes, my mistake - with 7.0-rc3 it works for me:

[    1.071767] sdhci-spacemit d4280000.mmc: Got CD GPIO
[    1.110368] mmc0: SDHCI controller on d4280000.mmc [d4280000.mmc] using ADMA
[    1.115231] clk: Disabling unused clocks
[    1.119072] PM: genpd: Disabling unused power domains
[    1.123875] ALSA device list:
[    1.1268[    1.130718] Waiting for root device PARTUUID=e94bfdd7-a36f-4315-a480-476e2a12403d...
[    1.181158] mmc0: new UHS-I speed DDR50 SDHC card at address aaaa
[    1.185341] mmcblk0: mmc0:aaaa SS16G 14.8 GiB
[    1.198009] GPT:Primary header thinks Alt. header is not at the end of the disk.
[    1.202874] GPT:1134331 != 31116287
[    1.206388] GPT:Alternate GPT header not at the end of the disk.
[    1.212468] GPT:1134331 != 31116287
[    1.215993] GPT: Use GNU Parted to correct GPT errors.
[    1.221230]  mmcblk0: p1 p2 p3
[    1.529978] EXT4-fs (mmcblk0p3): mounted filesystem dbc76877-092e-4f8a-9f06-bf286309d8de r/w with ordered data mode. Quota mode: disabled.
[    1.540069] VFS: Mounted root (ext4 filesystem) on device 179:3.


In which case:

Tested-by: Trevor Gamblin <tgamblin@baylibre.com>

Re: [PATCH v2 0/7] riscv: spacemit: enable SD card support with UHS modes for OrangePi RV2

[Anand Moon]

Hi Iker,

On Mon, 9 Mar 2026 at 17:11, Iker Pedrosa <ikerpedrosam@gmail.com> wrote:
>
> This series enables complete SD card support for the Spacemit K1-based
> OrangePi RV2 board, including UHS (Ultra High Speed) modes for
> high-performance SD card operation.
>
> Background
>
> The Spacemit K1 SoC includes an SDHCI controller capable of supporting
> SD cards up to UHS-I speeds (SDR104 at 208MHz). However, mainline
> currently lacks basic SD controller configuration, SDHCI driver
> enhancements for voltage switching and tuning, and power management
> infrastructure.
>
> Implementation
>
> The series enables SD card support through coordinated layers:
>
> - Hardware infrastructure (patches 1-2): Device tree bindings for voltage
> switching hardware and essential clock infrastructure.
> - SDHCI driver enhancements (patches 3-7): Regulator framework
> integration, pinctrl state switching for voltage domains, AIB register
> programming, and comprehensive SDR tuning support for reliable UHS
> operation.
> - SoC and board integration (patches 8-10): Complete K1 SoC controller
> definitions, PMIC power infrastructure, and OrangePi RV2 board enablement
> with full UHS support.
>
> This transforms the OrangePi RV2 from having no SD card support to full
> UHS-I capability, enabling high-performance storage up to 208MHz.
>
> Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
> ---
> Changes in v2:
> - Removed custom AIB voltage switching code per maintainer feedback. The
>   existing pinctrl driver already handles AIB voltage switching
>   automatically via power-source property changes during UHS mode
>   transitions. This eliminates code duplication.
> - Squashed regulator and pinctrl commits into single voltage switching
>   implementation.
> - Moved voltage switching callback from dynamic probe assignment to
>   static sdhci_ops declaration. Removed redundant SDHCI core call since
>   the framework handles standard voltage switching automatically.
> - Made clock override (SDHC_OVRRD_CLK_OEN | SDHC_FORCE_CLK_ON)
>   conditional for SD/SDIO cards only. This follows vendor driver pattern
>   of differentiating SD and eMMC card handling.
> - Include no-mmc property for SD card.
> - Link to v1: https://lore.kernel.org/r/20260302-orangepi-sd-card-uhs-v1-0-89c219973c0c@gmail.com
>

Thanks. Please include my tested with the SpacemiT Banna F3

Tested-by: Anand Moon <linux.amoon@gmail.com>

Thanks
-Anand

> ---
> Iker Pedrosa (7):
>       mmc: sdhci-of-k1: enable essential clock infrastructure for SD operation
>       mmc: sdhci-of-k1: add regulator and pinctrl voltage switching support
>       mmc: sdhci-of-k1: add SDR tuning infrastructure
>       mmc: sdhci-of-k1: add comprehensive SDR tuning support
>       riscv: dts: spacemit: k1: add SD card controller and pinctrl support
>       riscv: dts: spacemit: k1-orangepi-rv2: add PMIC and power infrastructure
>       riscv: dts: spacemit: k1-orangepi-rv2: add SD card support with UHS modes
>
>  arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts |  67 ++++++
>  arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi     |  40 ++++
>  arch/riscv/boot/dts/spacemit/k1.dtsi             |  13 ++
>  drivers/mmc/host/sdhci-of-k1.c                   | 252 +++++++++++++++++++++++
>  4 files changed, 372 insertions(+)
> ---
> base-commit: ec1fb4e55df47ed043ab2ccc6787e39b9d67e49b
> change-id: 20260226-orangepi-sd-card-uhs-0ecb05839b0c
>
> Best regards,
> --
> Iker Pedrosa <ikerpedrosam@gmail.com>
>
>
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