[PATCH v2 0/2] Validate and clean up UHS/DDR/HS200 timing checks

[PATCH v2 0/2] Validate and clean up UHS/DDR/HS200 timing checks

[Shawn Lin]

From: Shawn Lin <shawn.lin@rock-chips.com>


This series adds validation for UHS/DDR/HS200 timing modes when the host
only supports 1-bit bus width which also fixes a real performance drop issue
due to incorrect hs200 mode switch code. And then cleans up the check in
mmc_host_can_uhs().


Changes in v2:
- updating the temporary variables in the middle and update host's caps(2)
  in the final. (Ulf)

Luke Wang (1):
  mmc: core: Validate UHS/DDR/HS200 timing selection for 1-bit bus width

Shawn Lin (1):
  mmc: core: Remove checking MMC_CAP_4_BIT_DATA from mmc_host_can_uhs()

 drivers/mmc/core/host.c | 14 +++++++++++++-
 drivers/mmc/core/host.h |  6 +-----
 2 files changed, 14 insertions(+), 6 deletions(-)

-- 
2.7.4

[PATCH v2 1/2] mmc: core: Validate UHS/DDR/HS200 timing selection for 1-bit bus width

[Shawn Lin]

From: Luke Wang <ziniu.wang_1@nxp.com>

UHS/DDR/HS200 modes require at least 4-bit bus support. Host controllers
that lack relevant capability registers rely on paring properties provided
by firmware, which may incorrectly set these modes. Now that mmc_validate_host_caps()
has been introduced to validate such configuration violations, let's also
add checks for UHS/DDR/HS200 modes.

This fixes an issue where, if the HS200/HS400 property is set while only
a 1-bit bus width is used, mmc_select_hs200() returns 0 without actually
performing the mode switch. Consequently, mmc_select_timing() proceeds
without falling back to mmc_select_hs(), leaving the eMMC device operating
in legacy mode (26 MHz) instead of switching to High Speed mode (52 MHz).

Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com>
[Shawn: reword the commit msg and rework the code]
Signed-off-by: Shawn Lin <shawn.lin@linux.dev>
---

Changes in v2:
- updating the temporary variables in the middle and update host's caps(2)
  in the final. (Ulf)

 drivers/mmc/core/host.c | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c
index 88c95db..a457c88 100644
--- a/drivers/mmc/core/host.c
+++ b/drivers/mmc/core/host.c
@@ -624,12 +624,24 @@ static int mmc_validate_host_caps(struct mmc_host *host)
 		return -EINVAL;
 	}
 
+	/* UHS/DDR/HS200 modes require at least 4-bit bus */
+	if (!(caps & (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)) &&
+	    ((caps & (MMC_CAP_UHS | MMC_CAP_DDR)) || (caps2 & MMC_CAP2_HS200))) {
+		dev_warn(dev, "drop UHS/DDR/HS200 support since 1-bit bus only\n");
+		caps &= ~(MMC_CAP_UHS | MMC_CAP_DDR);
+		caps2 &= ~MMC_CAP2_HS200;
+	}
+
+	/* HS400 and HS400ES modes require 8-bit bus */
 	if (caps2 & (MMC_CAP2_HS400_ES | MMC_CAP2_HS400) &&
 	    !(caps & MMC_CAP_8_BIT_DATA) && !(caps2 & MMC_CAP2_NO_MMC)) {
 		dev_warn(dev, "drop HS400 support since no 8-bit bus\n");
-		host->caps2 = caps2 & ~MMC_CAP2_HS400_ES & ~MMC_CAP2_HS400;
+		caps2 &= ~(MMC_CAP2_HS400_ES | MMC_CAP2_HS400);
 	}
 
+	host->caps = caps;
+	host->caps2 = caps2;
+
 	return 0;
 }
 
-- 
2.7.4

[PATCH v2 2/2] mmc: core: Remove checking MMC_CAP_4_BIT_DATA from mmc_host_can_uhs()

[Shawn Lin]

The bus width support for UHS mode is now validated in mmc_validate_host_caps().
Therefore, we can safely remove the explicit MMC_CAP_4_BIT_DATA check from
mmc_host_can_uhs(). As part of this cleanup, simplify the condition by using
the consolidated MMC_CAP_UHS flag.

Signed-off-by: Shawn Lin <shawn.lin@linux.dev>
---

Changes in v2: None

 drivers/mmc/core/host.h | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/mmc/core/host.h b/drivers/mmc/core/host.h
index 5941d68..6bce5a4 100644
--- a/drivers/mmc/core/host.h
+++ b/drivers/mmc/core/host.h
@@ -56,11 +56,7 @@ static inline int mmc_host_can_access_boot(struct mmc_host *host)
 
 static inline int mmc_host_can_uhs(struct mmc_host *host)
 {
-	return host->caps &
-		(MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 |
-		 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 |
-		 MMC_CAP_UHS_DDR50) &&
-	       host->caps & MMC_CAP_4_BIT_DATA;
+	return host->caps & MMC_CAP_UHS;
 }
 
 static inline bool mmc_card_hs200(struct mmc_card *card)
-- 
2.7.4

Re: [PATCH v2 0/2] Validate and clean up UHS/DDR/HS200 timing checks

[Ulf Hansson]

On Tue, 10 Mar 2026 at 02:36, Shawn Lin <shawn.lin@linux.dev> wrote:
>
> From: Shawn Lin <shawn.lin@rock-chips.com>
>
>
> This series adds validation for UHS/DDR/HS200 timing modes when the host
> only supports 1-bit bus width which also fixes a real performance drop issue
> due to incorrect hs200 mode switch code. And then cleans up the check in
> mmc_host_can_uhs().
>
>
> Changes in v2:
> - updating the temporary variables in the middle and update host's caps(2)
>   in the final. (Ulf)
>
> Luke Wang (1):
>   mmc: core: Validate UHS/DDR/HS200 timing selection for 1-bit bus width
>
> Shawn Lin (1):
>   mmc: core: Remove checking MMC_CAP_4_BIT_DATA from mmc_host_can_uhs()
>
>  drivers/mmc/core/host.c | 14 +++++++++++++-
>  drivers/mmc/core/host.h |  6 +-----
>  2 files changed, 14 insertions(+), 6 deletions(-)
>
> --
> 2.7.4
>

The series applied for next, thanks!

Kind regards
Uffe