[PATCH v3 2/5] arm64: dts: ti: k3-am68-phycore-som: Add DSI->LVDS bridge

Dominik Haller
2026-03-11T23:49:14Z

Add the TI SN65DSI83 MIPI-DSI->LVDS bridge that can be populated on the
phyCORE-AM68x/TDA4x.

Signed-off-by: Dominik Haller <d.haller@phytec.de>
---
arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi
index 0ff511028f81..ab87767419fe 100644
--- a/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi
@@ -151,6 +151,12 @@ J721S2_WKUP_IOPAD(0x09c, PIN_INPUT_PULLUP, 0) /* (H27) WKUP_I2C0_SDA */
>;
bootph-all;
};
+
+ wkup_sn65dsi83_pins_default: wkup-sn65dsi83-default-pins {
+ pinctrl-single,pins = <
+ J721S2_WKUP_IOPAD(0x084, PIN_OUTPUT, 7) /* (F25) WKUP_GPIO0_11 */
+ >;
+ };
};

&main_cpsw {
@@ -183,6 +189,17 @@ &main_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;

+ sn65dsi83: bridge@2d {
+ compatible = "ti,sn65dsi83";
+ reg = <0x2d>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&wkup_sn65dsi83_pins_default>;
+ enable-gpios = <&wkup_gpio0 11 GPIO_ACTIVE_LOW>;
+ vcc-supply = <&bucka4>;
+ /* enabled in panel overlay */
+ status = "disabled";
+ };
+
temperature-sensor@48 {
compatible = "ti,tmp102";
reg = <0x48>;
--
2.43.0