From: Sudarshan Shetty <tessolveupstream@gmail.com>
To: andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org
Cc: Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se,
jernej.skrabec@gmail.com, maarten.lankhorst@linux.intel.com,
mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com,
simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, marex@denx.de, valentin@compulab.co.il,
philippe.schenker@toradex.com, dri-devel@lists.freedesktop.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
Sudarshan Shetty <tessolveupstream@gmail.com>
Subject: [PATCH v2 2/2] drm: bridge: ti-sn65dsi83: Add support for dual-link LVDS video mode
Date: Thu, 12 Mar 2026 10:07:43 +0530 [thread overview]
Message-ID: <20260312043743.261475-3-tessolveupstream@gmail.com> (raw)
In-Reply-To: <20260312043743.261475-1-tessolveupstream@gmail.com>
Some LVDS panels operating in dual-link mode require adjusted
horizontal timing parameters when programmed into the SN65DSI84
bridge. According to TI documentation, horizontal timing values
must be divided by two when operating in dual-link mode. Without
this adjustment, the panel may fail to display or produce corrupted
output.
Add support for an optional DT property "ti,dual-link-video-mode"
to enable configuration required for dual-link LVDS operation.
These settings ensure correct LVDS output for panels that require
this mode of operation.
Signed-off-by: Sudarshan Shetty <tessolveupstream@gmail.com>
---
drivers/gpu/drm/bridge/ti-sn65dsi83.c | 52 ++++++++++++++++++++++++---
1 file changed, 48 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
index f6736b4457bb..9b7d35487bd8 100644
--- a/drivers/gpu/drm/bridge/ti-sn65dsi83.c
+++ b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
@@ -164,6 +164,7 @@ struct sn65dsi83 {
int irq;
struct delayed_work monitor_work;
struct work_struct reset_work;
+ bool dual_link_video_mode;
};
static const struct regmap_range sn65dsi83_readable_ranges[] = {
@@ -667,8 +668,43 @@ static void sn65dsi83_atomic_pre_enable(struct drm_bridge *bridge,
mode->hsync_start - mode->hdisplay);
regmap_write(ctx->regmap, REG_VID_CHA_VERTICAL_FRONT_PORCH,
mode->vsync_start - mode->vdisplay);
- regmap_write(ctx->regmap, REG_VID_CHA_TEST_PATTERN, 0x00);
+ /*
+ * In dual-link LVDS mode, the SN65DSI84 requires the horizontal
+ * timing parameters to be adjusted before being programmed into
+ * the device. According to TI documentation, the horizontal timing
+ * values must be divided by two when operating in dual-link mode.
+ * Without this adjustment, the connected panel may fail to light up
+ * or display corrupted output.
+ *
+ * TI also provides recommended register settings for this mode,
+ * which were derived using the TI DSI-Tuner tool. When the optional
+ * DT property "ti,dual-link-video-mode" is present, apply these
+ * configuration settings to ensure correct dual-link LVDS operation.
+ */
+ if (ctx->dual_link_video_mode) {
+ regmap_write(ctx->regmap, REG_RC_LVDS_PLL, 0x05);
+ regmap_write(ctx->regmap, REG_RC_PLL_EN, 0x00);
+ regmap_write(ctx->regmap, REG_DSI_CLK, 0x53);
+ regmap_write(ctx->regmap, REG_LVDS_FMT, 0x6f);
+ regmap_write(ctx->regmap, REG_LVDS_VCOM, 0x00);
+ regmap_write(ctx->regmap,
+ REG_VID_CHA_VERTICAL_DISPLAY_SIZE_LOW, 0x00);
+ regmap_write(ctx->regmap,
+ REG_VID_CHA_VERTICAL_DISPLAY_SIZE_HIGH, 0x00);
+ regmap_write(ctx->regmap,
+ REG_VID_CHA_HSYNC_PULSE_WIDTH_LOW, 0x10);
+ regmap_write(ctx->regmap,
+ REG_VID_CHA_HORIZONTAL_BACK_PORCH, 0x28);
+ regmap_write(ctx->regmap,
+ REG_VID_CHA_VERTICAL_BACK_PORCH, 0x00);
+ regmap_write(ctx->regmap,
+ REG_VID_CHA_HORIZONTAL_FRONT_PORCH, 0x00);
+ regmap_write(ctx->regmap,
+ REG_VID_CHA_VERTICAL_FRONT_PORCH, 0x00);
+ }
+
+ regmap_write(ctx->regmap, REG_VID_CHA_TEST_PATTERN, 0x00);
/* Enable PLL */
regmap_write(ctx->regmap, REG_RC_PLL_EN, REG_RC_PLL_EN_PLL_EN);
usleep_range(3000, 4000);
@@ -965,9 +1001,15 @@ static int sn65dsi83_host_attach(struct sn65dsi83 *ctx)
dsi->lanes = dsi_lanes;
dsi->format = MIPI_DSI_FMT_RGB888;
- dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
- MIPI_DSI_MODE_VIDEO_NO_HFP | MIPI_DSI_MODE_VIDEO_NO_HBP |
- MIPI_DSI_MODE_VIDEO_NO_HSA | MIPI_DSI_MODE_NO_EOT_PACKET;
+ if (ctx->dual_link_video_mode)
+ dsi->mode_flags = MIPI_DSI_MODE_VIDEO;
+ else
+ dsi->mode_flags = MIPI_DSI_MODE_VIDEO |
+ MIPI_DSI_MODE_VIDEO_BURST |
+ MIPI_DSI_MODE_VIDEO_NO_HFP |
+ MIPI_DSI_MODE_VIDEO_NO_HBP |
+ MIPI_DSI_MODE_VIDEO_NO_HSA |
+ MIPI_DSI_MODE_NO_EOT_PACKET;
ret = devm_mipi_dsi_attach(dev, dsi);
if (ret < 0) {
@@ -1021,6 +1063,8 @@ static int sn65dsi83_probe(struct i2c_client *client)
if (ret)
return ret;
+ ctx->dual_link_video_mode =
+ of_property_read_bool(dev->of_node, "ti,dual-link-video-mode");
ctx->regmap = devm_regmap_init_i2c(client, &sn65dsi83_regmap_config);
if (IS_ERR(ctx->regmap))
return dev_err_probe(dev, PTR_ERR(ctx->regmap), "failed to get regmap\n");
--
2.34.1
next prev parent reply other threads:[~2026-03-12 4:38 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-12 4:37 [PATCH v2 0/2] drm: bridge: ti-sn65dsi83: Improve dual-link LVDS support Sudarshan Shetty
2026-03-12 4:37 ` [PATCH v2 1/2] dt-bindings: display: bridge: ti,sn65dsi83: Add dual-link video mode property Sudarshan Shetty
2026-03-12 15:46 ` [PATCH v2 1/2] dt-bindings: display: bridge: ti, sn65dsi83: " Luca Ceresoli
2026-03-13 8:55 ` Krzysztof Kozlowski
2026-03-18 5:48 ` tessolveupstream
2026-03-18 5:49 ` tessolveupstream
2026-03-12 4:37 ` Sudarshan Shetty [this message]
2026-03-12 15:47 ` [PATCH v2 2/2] drm: bridge: ti-sn65dsi83: Add support for dual-link LVDS video mode Luca Ceresoli
2026-03-18 5:53 ` tessolveupstream
2026-03-18 8:52 ` Luca Ceresoli
2026-03-12 5:05 ` [PATCH v2 0/2] drm: bridge: ti-sn65dsi83: Improve dual-link LVDS support Marek Vasut
2026-03-12 12:35 ` tessolveupstream
2026-03-12 15:49 ` Luca Ceresoli
2026-03-18 5:45 ` tessolveupstream
2026-03-18 8:51 ` Luca Ceresoli
2026-03-19 9:55 ` tessolveupstream
2026-03-19 13:47 ` Luca Ceresoli
2026-03-24 11:00 ` tessolveupstream
2026-03-24 11:10 ` Alexander Stein
2026-03-25 6:09 ` tessolveupstream
2026-03-25 7:14 ` Alexander Stein
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