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The most relevant change is probably the renaming of `write_val` into `write_reg` and its specialization for register types. All the other, more minor feedback has also been addressed. This revision is based on `driver-core-next` as of 2026-03-09. The top patch also depends on `drm-rust-next`, but it is only here to illustrate what client code looks like. A tree with this series and its dependencies is available at [1]. [1] https://github.com/Gnurou/linux/tree/b4/register Signed-off-by: Alexandre Courbot --- Changes in v9: - Make `IoLoc::offset` take `self` by value. - Move `IntoIoVal`'s generic argument into associated types. - Rename `IntoIoVal` into `LocatedRegister` and make it exclusive to registers. - Add missing `#[inline(always)]` statements. - Move some of the `register!` documentation to the module level. - Publicly export `register!` and `kernel::io` and use this reference in the code. - Properly format imports in doc examples. - Re-word note about race conditions of the `update` and `try_update` methods. - Fix build error in nova-core port to the new macro. - Link to v8: https://patch.msgid.link/20260310-register-v8-0-424f80dd43bc@nvidia.com Changes in v8: - Use two-arguments `Io::write` with a convenience single-argument `Io::write_val`. - Remove the `IoWrite` type, all helper methods of `IoLoc`, and stop relying on closures to write values. - Add traits for specifying relative and array register locations. - Improved documentation and examples. - Link to v7: https://patch.msgid.link/20260224-register-v7-0-aad44f760f33@nvidia.com Changes in v7: - Use `RES + SHIFT >= N` instead of `RES >= N - SHIFT` in `Bounded::shr`. - Rename `IoRef` to `IoLoc` and all related types accordingly. - Use `Into` trait bounds in both directions on `IoLoc`. - Add RFC patch allowing fixed register values to be used directly with `write`. - Link to v6: https://patch.msgid.link/20260216-register-v6-0-eec9a4de9e9e@nvidia.com Changes in v6: - Remove Tested-by tags as the code has considerably changed. - Make `Bounded::get` const so it can be used with registers. - Use the `pin_init::zeroed()` const function instead of defining our own method. - Generalize all `Io` around the new `IoRef` and `IoWrite` types, and make registers use these as well. - Use the more natural pattern of having the `Io` type perform the I/O access instead of the register type. - Convert the whole PCI driver example, and not only the PCI configuration space. - Rename `Bounded::as_bool` to `Bounded::into_bool`. - Drop `Bounded::into_inner` in favor of making `Bounded::get` const. - Link to v5: https://patch.msgid.link/20260129-register-v5-0-c4587c902514@nvidia.com Changes in v5: - Rename all setters to `with_*` and `with_const_*`. - Use `, stride = ` to specify the stride of register arrays. - Remove `Deref` requirement on the `RegisterIo` trait and make it `#[doc(hidden)`. - Simplify the top dispatch rule a bit. - Link to v4: https://patch.msgid.link/20260128-register-v4-0-aee3a33d9649@nvidia.com Changes in v4: - Add `with_` const field setter methods (removing the need to call `Bounded::new` for constant field values). - Add `into_inner` const method for `Bounded`. - Add `from_raw` and const `zeroed` method to create initial register values. - More documentation improvements. - Link to v3: https://patch.msgid.link/20260126-register-v3-0-2328a59d7312@nvidia.com Changes in v3: - Sort the Rust features list alphabetically. - Rebase on top of latest `driver-core-next` including the new Io trait. - Allow several registers to be defined from the same macro invocation. - Remove references to `bitfield!` macro. - Fix doccomment of `shr` and `shl`. - Use `+` syntax for relative register offsets. - Move register arrays size and stride to after the backing type declaration. - Use regular doccomments to document registers and fields (thanks Gary!). - Remove `Default` implementation and implement the more predictable `Zeroable` instead. - Improve doccomments a bit. - Link to v2: https://patch.msgid.link/20260121-register-v2-0-79d9b8d5e36a@nvidia.com Changes in v2: - Remove `bitfield!` and put its rules into `register!` to give it more time to get reviewed. - Allow output type larger than strictly required for `shr` and `shl` on `Bounded`. - Enable the `generic_arg_infer` feature, required for rustc < 1.89. - Link to v1: https://patch.msgid.link/20260120-register-v1-0-723a1743b557@nvidia.com --- Alexandre Courbot (10): rust: enable the `generic_arg_infer` feature rust: num: add `shr` and `shl` methods to `Bounded` rust: num: add `into_bool` method to `Bounded` rust: num: make Bounded::get const rust: io: add IoLoc type and generic I/O accessors rust: io: use generic read/write accessors for primitive accesses rust: io: add `register!` macro rust: io: introduce `write_reg` and `LocatedRegister` sample: rust: pci: use `register!` macro [FOR REFERENCE] gpu: nova-core: use the kernel `register!` macro drivers/gpu/nova-core/falcon.rs | 333 +++--- drivers/gpu/nova-core/falcon/gsp.rs | 25 +- drivers/gpu/nova-core/falcon/hal/ga102.rs | 70 +- drivers/gpu/nova-core/falcon/hal/tu102.rs | 12 +- drivers/gpu/nova-core/falcon/sec2.rs | 17 +- drivers/gpu/nova-core/fb.rs | 6 +- drivers/gpu/nova-core/fb/hal/ga100.rs | 37 +- drivers/gpu/nova-core/fb/hal/ga102.rs | 7 +- drivers/gpu/nova-core/fb/hal/tu102.rs | 17 +- drivers/gpu/nova-core/firmware/fwsec/bootloader.rs | 19 +- drivers/gpu/nova-core/gfw.rs | 11 +- drivers/gpu/nova-core/gpu.rs | 36 +- drivers/gpu/nova-core/gsp/boot.rs | 11 +- drivers/gpu/nova-core/gsp/cmdq.rs | 9 +- drivers/gpu/nova-core/regs.rs | 616 +++++----- drivers/gpu/nova-core/regs/macros.rs | 739 ------------ rust/kernel/io.rs | 411 ++++++- rust/kernel/io/register.rs | 1258 ++++++++++++++++++++ rust/kernel/lib.rs | 3 + rust/kernel/num/bounded.rs | 70 +- samples/rust/rust_driver_pci.rs | 84 +- scripts/Makefile.build | 3 +- 22 files changed, 2416 insertions(+), 1378 deletions(-) --- base-commit: a985880eb0f73b0d497d30dcce73e537f787b6c0 change-id: 20260117-register-ccaba1d21713 Best regards, -- Alexandre Courbot