From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from casper.infradead.org (casper.infradead.org [90.155.50.34]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 31C3537FF5B for ; Tue, 17 Mar 2026 08:18:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=90.155.50.34 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773735529; cv=none; b=hK29SATIDpAt/XJplKV2as0R0CAxRkzpsMvxCelIxFtmEEhBiI77syug0y3j6JLpDk/ddcwzJHBefgLS8wgsLFeStwFNNzorhmcUfGb0hm3MxKgDYZ06Xxk5Mx1S6IZCbtqKBPXlX/ZRPNga1BX7bJWCnD3WMp+KNz4jT2FUjOE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773735529; c=relaxed/simple; bh=EQJf/O81uauk1DMf1svgB0XzXIpDB24iwA9Hvl1gaHk=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=uBeR1liWDXiZMZUJl/rq6oo4RIJLDf7XJOfORnC+jQgUGuCeCGBKnrI/3x7F3KfDq/fhoF2fQbNjN8uNDFAaC1WUq6SmdMVWgmtmhQlEvkR74Un6CdVcpCQGpD4Y5+cOwadAp8U9Gn/v/2um28UFUtBULPi9L29+ngPnYExnI/8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=infradead.org; spf=none smtp.mailfrom=infradead.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b=LRT7aAoj; arc=none smtp.client-ip=90.155.50.34 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=infradead.org Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=infradead.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b="LRT7aAoj" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=rwMFGahR+JxCmJcCfL/VRosstybgQzL1zegBfEaWbGs=; b=LRT7aAojtlG1fzkws/yie5Tp+3 ELSJucHG7PmLNUlPFFFm66wTnlGIOuc4C/b8LYcljoaUeNNOBgyyHn5njohZOwMCVDvIplJzO3dzR njEvwF+jyiAxZ/5DqpfxCmxyX2mYQoxUjzfzQzPpcDGqbMLu6s5+C0NCSTGJzHoKWuqYX1rGd91pY lrax9TfvyrWLdhQzBT0nxFZ+8kd3WiNg08jx8EoeQlbRkfzLasOZ4t01GfKsmeWme3wK8yA2vISqv /6gq6TxNYrlaO/Ssnafe6pKnW3Uolnd3weAJx3Zlc06h4Eeg5ALgF6cOApFGmUHXf1QWvuHOdtspg hW1cXFvA==; Received: from 77-249-17-252.cable.dynamic.v4.ziggo.nl ([77.249.17.252] helo=noisy.programming.kicks-ass.net) by casper.infradead.org with esmtpsa (Exim 4.98.2 #2 (Red Hat Linux)) id 1w2PdS-00000002M6i-14rc; Tue, 17 Mar 2026 08:18:42 +0000 Received: by noisy.programming.kicks-ass.net (Postfix, from userid 1000) id C8851301BDE; Tue, 17 Mar 2026 09:18:25 +0100 (CET) Date: Tue, 17 Mar 2026 09:18:25 +0100 From: Peter Zijlstra To: Josh Poimboeuf Cc: x86@kernel.org, linux-kernel@vger.kernel.org, Arnd Bergmann Subject: Re: [PATCH] objtool: Support Clang RAX DRAP sequence Message-ID: <20260317081825.GC3738010@noisy.programming.kicks-ass.net> References: <3f33dc720b83dc6d3a2b7094f75a5c90a0b1cbc5.1773708458.git.jpoimboe@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <3f33dc720b83dc6d3a2b7094f75a5c90a0b1cbc5.1773708458.git.jpoimboe@kernel.org> On Mon, Mar 16, 2026 at 05:47:56PM -0700, Josh Poimboeuf wrote: > Recent Clang can use RAX as a temporary register for the DRAP stack > alignment sequence. Add support for that. > > Fixes the following warning: > > vmlinux.o: error: objtool: vmw_host_printf+0xd: unknown CFA base reg 0 > > Reported-by: Arnd Bergmann > Closes: https://lore.kernel.org/cefefdd1-7b82-406d-8ff4-e4b167e45ee6@app.fastmail.com > Signed-off-by: Josh Poimboeuf > --- > arch/x86/include/asm/orc_types.h | 1 + > arch/x86/kernel/unwind_orc.c | 8 ++++++++ > tools/arch/x86/include/asm/orc_types.h | 1 + > tools/objtool/arch/x86/decode.c | 3 +++ > tools/objtool/arch/x86/orc.c | 5 +++++ > 5 files changed, 18 insertions(+) > > diff --git a/arch/x86/include/asm/orc_types.h b/arch/x86/include/asm/orc_types.h > index e0125afa53fb..b3cc7970fa54 100644 > --- a/arch/x86/include/asm/orc_types.h > +++ b/arch/x86/include/asm/orc_types.h > @@ -37,6 +37,7 @@ > #define ORC_REG_R13 7 > #define ORC_REG_BP_INDIRECT 8 > #define ORC_REG_SP_INDIRECT 9 > +#define ORC_REG_AX 10 > #define ORC_REG_MAX 15 I'm 'annoyed' at the placement of that register. I know its not important, but I can't silence my OCD saying that AX should come before DX. Also, SP comes before BP and both before DI. Something like so perhaps? --- diff --git a/arch/x86/include/asm/orc_types.h b/arch/x86/include/asm/orc_types.h index e0125afa53fb..5df398761c70 100644 --- a/arch/x86/include/asm/orc_types.h +++ b/arch/x86/include/asm/orc_types.h @@ -28,15 +28,19 @@ * and GCC realigned stacks. */ #define ORC_REG_UNDEFINED 0 -#define ORC_REG_PREV_SP 1 + +#define ORC_REG_AX 1 #define ORC_REG_DX 2 -#define ORC_REG_DI 3 +#define ORC_REG_SP 3 #define ORC_REG_BP 4 -#define ORC_REG_SP 5 +#define ORC_REG_DI 5 #define ORC_REG_R10 6 #define ORC_REG_R13 7 -#define ORC_REG_BP_INDIRECT 8 + +#define ORC_REG_PREV_SP 8 #define ORC_REG_SP_INDIRECT 9 +#define ORC_REG_BP_INDIRECT 10 + #define ORC_REG_MAX 15 #define ORC_TYPE_UNDEFINED 0