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From: Eric Biggers <ebiggers@kernel.org>
To: David Laight <david.laight.linux@gmail.com>
Cc: Demian Shulhan <demyansh@gmail.com>,
	ardb@kernel.org, linux-crypto@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] lib/crc: arm64: add NEON accelerated CRC64-NVMe implementation
Date: Fri, 20 Mar 2026 13:00:39 -0700	[thread overview]
Message-ID: <20260320200039.GA2085@quark> (raw)
In-Reply-To: <20260320103624.0e13d26f@pumpkin>

On Fri, Mar 20, 2026 at 10:36:24AM +0000, David Laight wrote:
> I'm also pretty sure that the same loop will process 32bit and 16bit CRC
> (just needs the high bits of the constant multiplier set to zero).
> There are fewer bits to correct for at the end (I think it is always
> the size of the CRC) but that may not be worth worrying about.

Again, see lib/crc/x86/ and lib/crc/riscv/ which do basically this.

> It might be better to write some C that required the architecture provide
> the functions required for doing a CRC with 128bit registers that hold
> two 64bit values (etc) and give them sane names.
>
> Then common C code can be used provided the required instructions exist.

While it would be great to share more CRC code between architectures by
using a C "template" combined with some arch-dependent inline asm
blocks, there's actually a lot of variation in what instructions and
register widths the different architectures have.

lib/crc/riscv/crc-clmul-template.h actually has something very similar
to this already: it's written in C, and there are just three
single-instruction inline asm blocks to access RISC-V's clmul
instructions.  Unfortunately, the carryless multiplication instructions
on the other architectures are not compatible with these.  So, it's hard
to make it anything more than RISC-V specific code.

There might be enough similarity between arm, arm64, and x86_64 for them
to share code using a similar "template".  However, consider that for
x86_64 we need to support different register widths.  See
lib/crc/x86/crc-pclmul-template.S.

> I'm pretty sure the loop is effectively:
> 	for (; p < limit; p++)
> 		p[N] ^= low(*p) * const_a ^ high(*p) * const_b;
> where N is at least one and you don't actually want to write into the buffer.
> Making N > 1 should improve performance - just needs care.

Well, you're welcome to read the actual code and not just speculate.

But again, maybe best to not get too sidetracked for now, unless you or
Demian are actually planning to work on the more general version.

- Eric

  reply	other threads:[~2026-03-20 20:00 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-17  6:54 [PATCH] lib/crc: arm64: add NEON accelerated CRC64-NVMe implementation Demian Shulhan
2026-03-19 19:09 ` Eric Biggers
2026-03-20 10:36   ` David Laight
2026-03-20 20:00     ` Eric Biggers [this message]
2026-03-22  9:29       ` Demian Shulhan
2026-03-22 14:13         ` Eric Biggers
2026-03-19 23:31 ` David Laight
2026-03-20 11:22 ` kernel test robot
2026-03-27  6:02 ` [PATCH v2] " Demian Shulhan

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