From: Jason Gunthorpe <jgg@nvidia.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: Nicolin Chen <nicolinc@nvidia.com>,
will@kernel.org, robin.murphy@arm.com, bhelgaas@google.com,
joro@8bytes.org, praan@google.com, baolu.lu@linux.intel.com,
kevin.tian@intel.com, miko.lenczewski@arm.com,
linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
dan.j.williams@intel.com, jonathan.cameron@huawei.com,
vsethi@nvidia.com, linux-cxl@vger.kernel.org
Subject: Re: [PATCH v3 1/3] PCI: Allow ATS to be always on for CXL.cache capable devices
Date: Thu, 26 Mar 2026 18:51:16 -0300 [thread overview]
Message-ID: <20260326215116.GK67624@nvidia.com> (raw)
In-Reply-To: <20260326213854.GA1348488@bhelgaas>
On Thu, Mar 26, 2026 at 04:38:54PM -0500, Bjorn Helgaas wrote:
> It's only called from arm-smmu-v3.c. Is there something unique about
> SMMU, or will other IOMMUs need something similar?
Yeah, every iommu driver will eventually want to use this. IIRC the
motivation for using the pci core was to make use of pci quirks.
Right now ARM is the only one that turns ATS off for identity, but
IMHO those are bugs in the other drivers to not do that.
Jason
next prev parent reply other threads:[~2026-03-26 21:51 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-06 23:41 [PATCH v3 0/3] Allow ATS to be always on for certain ATS-capable devices Nicolin Chen
2026-03-06 23:41 ` [PATCH v3 1/3] PCI: Allow ATS to be always on for CXL.cache capable devices Nicolin Chen
2026-03-08 20:49 ` Nirmoy Das
2026-03-08 20:53 ` Nirmoy Das
2026-03-09 11:48 ` Jonathan Cameron
2026-03-26 21:38 ` Bjorn Helgaas
2026-03-26 21:51 ` Jason Gunthorpe [this message]
2026-03-06 23:41 ` [PATCH v3 2/3] PCI: Allow ATS to be always on for pre-CXL devices Nicolin Chen
2026-03-08 20:50 ` Nirmoy Das
2026-03-08 20:54 ` Nirmoy Das
2026-03-09 11:50 ` Jonathan Cameron
2026-03-06 23:41 ` [PATCH v3 3/3] iommu/arm-smmu-v3: Allow ATS to be always on Nicolin Chen
2026-03-08 20:52 ` Nirmoy Das
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