Re: [PATCH 10/10] iommu/vt-d: Simplify calculate_psi_aligned_address()

[Jason Gunthorpe <jgg@nvidia.com>]

On Thu, Apr 02, 2026 at 04:39:08PM +0800, Baolu Lu wrote:
> On 4/2/26 14:57, Lu Baolu wrote:
> > From: Jason Gunthorpe<jgg@nvidia.com>
> > 
> > This is doing far too much math for the simple task of finding a power
> > of 2 that fully spans the given range. Use fls directly on the xor
> > which computes the common binary prefix.
> > 
> > Signed-off-by: Jason Gunthorpe<jgg@nvidia.com>
> > Link:https://lore.kernel.org/r/4-v1-f175e27af136+11647-
> > iommupt_inv_vtd_jgg@nvidia.com
> > Signed-off-by: Lu Baolu<baolu.lu@linux.intel.com>
> > ---
> >   drivers/iommu/intel/cache.c | 49 ++++++++++++-------------------------
> >   1 file changed, 16 insertions(+), 33 deletions(-)
> 
> Hi Joerg,
> 
> Can you please remove this last patch from the pull request? The AI
> reviewer reported an issue in this patch.
> 
> https://sashiko.dev/#/patchset/20260402065734.1687476-1-baolu.lu%40linux.intel.com

Yeah, that's an interesting remark. I think this is enough to deal
with all of its items:

-       if (unlikely(sz_lg2 >= MAX_AGAW_PFN_WIDTH)) {
+       if (unlikely(sz_lg2 >= BITS_PER_LONG)) {
+               /*
+                * MAX_AGAW_PFN_WIDTH triggers full invalidation in all
+                * downstream users.
+                */
                *size_order = MAX_AGAW_PFN_WIDTH;
                return 0;
        }

1) Yes AGAW_PFN_WIDTH is in "PFN" not byte notation, so it is off by
   12 bits and we would errantly move to full invalidation too soon
2) Yes, if sz_lg2 is BITS_PER_LONG the GENMASK explodes, in this case
   it should trigger full invalidation even if ulong is 32 bits
3) Yes, we sould retain the 0/ULONG_MASK means full invalidation, but
   this happens properly now because of the above BITS_PER_LONG check
   so no need to bring back the other check.

I'll post an updated patch

Jason