From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4ABC1346AC3 for ; Wed, 8 Apr 2026 21:14:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.19 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775682858; cv=none; b=nT+IkRGXTcju5xnA5S/hXkA6h7TquhqcHnLe5vlaLex1nMgwIJPIQOamNUzgNbl99yPNscbYfhnWuTZJzzRQTReUyB1j9uaIL2yrGhdLSvYeyJLVcd8X+kcui4q7oRhcPXhfY4wgV2c4unVbb98tHuKu+C0YBzurH9TFAwv0y1U= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775682858; c=relaxed/simple; bh=9ANUT8QdPo5iyQxCYTvuSXlBIUzBWrhApFgNzvDSbLM=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version:Content-Type; b=qxYSAQtAXGUEoJMY3OeqgbrxsyE/I3rd+kylm4oRqFHDSkkIVLBUUScP911MSvqkP2w2SHCALoSIIAIjFz2bH7n8/TNzrbMpODLjAXlygK2upCaMON+klfBHu/905Sso9q0Kw8ansLWbLLcMvZBThexjxoEIQuOLnpGWqz/whsU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Ch14bO7v; arc=none smtp.client-ip=198.175.65.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Ch14bO7v" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1775682857; x=1807218857; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=9ANUT8QdPo5iyQxCYTvuSXlBIUzBWrhApFgNzvDSbLM=; b=Ch14bO7vtuAkDVNrSCja/bqCu+Fz9Ixu0GT6lGikxjMa9r+ukzYvqxsn lrQLTGYouQECL96Jad5nD7e9R5PAlzX2Y2mkcLYb5TFdPAoutrf6p1E8G +QW+LSzeZKxl8X8qCEZ/jYka9h+xlgTTIr/vlMhvUy1bs+hgvUFmnzDyl 2e/B5a4RX4YNQ7KUyW2Y1n+TiHx9O6ZLsvSGb5DKI+xbQjkQMRn6v7Ekm oohhdwxoYXTg6qnTZRWHVFC0l/PL5qeynFbFTOC4WY1IZTNMmft7CJX8o ujiby3RSCJYYFs0kvh4QR9nxq+rVaRWQF9p+mtBVHPMa7uavrvw+OqfHq A==; X-CSE-ConnectionGUID: AOjze7q3TnC2XSMTnGy2Lw== X-CSE-MsgGUID: 4J3DEg+8TI66xvhR6CCXTQ== X-IronPort-AV: E=McAfee;i="6800,10657,11753"; a="76583110" X-IronPort-AV: E=Sophos;i="6.23,168,1770624000"; d="scan'208";a="76583110" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Apr 2026 14:14:17 -0700 X-CSE-ConnectionGUID: pMtrtxS2QqKzYiiMiOok4Q== X-CSE-MsgGUID: Ydf4K/UpR8anBuZiejN56Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,168,1770624000"; d="scan'208";a="227586491" Received: from black.igk.intel.com ([10.91.253.5]) by orviesa006.jf.intel.com with ESMTP; 08 Apr 2026 14:14:14 -0700 Received: by black.igk.intel.com (Postfix, from userid 1003) id C928C95; Wed, 08 Apr 2026 23:14:13 +0200 (CEST) From: Andy Shevchenko To: Andy Shevchenko , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Lukas Wunner , Andrew Morton Subject: [PATCH v3 1/1] mtd: cfi_cmdset_0001: Factor out do_write_buffer_locked() to reduce stack frame Date: Wed, 8 Apr 2026 23:11:48 +0200 Message-ID: <20260408211407.2295175-1-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.50.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Compiler is not happy about used stack frame: drivers/mtd/chips/cfi_cmdset_0001.c: In function 'do_write_buffer': drivers/mtd/chips/cfi_cmdset_0001.c:1887:1: error: the frame size of 1296 bytes is larger than 1280 bytes [-Werror=frame-larger-than=] Fix this by factoring out do_write_buffer_locked(). Signed-off-by: Andy Shevchenko --- v3: addressed set but unused variables when MTD_XIP=y (LKP) v2: kept DIS/ENABLE_VPP paired drivers/mtd/chips/cfi_cmdset_0001.c | 88 +++++++++++++++++------------ 1 file changed, 51 insertions(+), 37 deletions(-) diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c index 5a4d2e16a9d1..7733e076ad40 100644 --- a/drivers/mtd/chips/cfi_cmdset_0001.c +++ b/drivers/mtd/chips/cfi_cmdset_0001.c @@ -1154,7 +1154,8 @@ static void __xipram xip_enable(struct map_info *map, struct flchip *chip, static int __xipram xip_wait_for_operation( struct map_info *map, struct flchip *chip, - unsigned long adr, unsigned int chip_op_time_max) + unsigned long adr, unsigned long inval_adr, int inval_len, + unsigned int chip_op_time, unsigned int chip_op_time_max) { struct cfi_private *cfi = map->fldrv_priv; struct cfi_pri_intelext *cfip = cfi->cmdset_priv; @@ -1276,8 +1277,7 @@ static int __xipram xip_wait_for_operation( #define XIP_INVAL_CACHED_RANGE(map, from, size) \ INVALIDATE_CACHED_RANGE(map, from, size) -#define INVAL_CACHE_AND_WAIT(map, chip, cmd_adr, inval_adr, inval_len, usec, usec_max) \ - xip_wait_for_operation(map, chip, cmd_adr, usec_max) +#define INVAL_CACHE_AND_WAIT xip_wait_for_operation #else @@ -1720,42 +1720,24 @@ static int cfi_intelext_write_words (struct mtd_info *mtd, loff_t to , size_t le } -static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip, - unsigned long adr, const struct kvec **pvec, - unsigned long *pvec_seek, int len) +static int __xipram do_write_buffer_locked(struct map_info *map, struct flchip *chip, + unsigned long cmd_adr, unsigned long adr, + const struct kvec **pvec, + unsigned long *pvec_seek, int len) { struct cfi_private *cfi = map->fldrv_priv; map_word status, write_cmd, datum; - unsigned long cmd_adr; - int ret, wbufsize, word_gap, words; + int ret, word_gap, words; const struct kvec *vec; unsigned long vec_seek; unsigned long initial_adr; int initial_len = len; - wbufsize = cfi_interleave(cfi) << cfi->cfiq->MaxBufWriteSize; - adr += chip->start; initial_adr = adr; - cmd_adr = adr & ~(wbufsize-1); - - /* Sharp LH28F640BF chips need the first address for the - * Page Buffer Program command. See Table 5 of - * LH28F320BF, LH28F640BF, LH28F128BF Series (Appendix FUM00701) */ - if (is_LH28F640BF(cfi)) - cmd_adr = adr; /* Let's determine this according to the interleave only once */ write_cmd = (cfi->cfiq->P_ID != P_ID_INTEL_PERFORMANCE) ? CMD(0xe8) : CMD(0xe9); - mutex_lock(&chip->mutex); - ret = get_chip(map, chip, cmd_adr, FL_WRITING); - if (ret) { - mutex_unlock(&chip->mutex); - return ret; - } - - XIP_INVAL_CACHED_RANGE(map, initial_adr, initial_len); - ENABLE_VPP(map); xip_disable(map, chip, cmd_adr); /* ยง4.8 of the 28FxxxJ3A datasheet says "Any time SR.4 and/or SR.5 is set @@ -1789,7 +1771,7 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip, xip_enable(map, chip, cmd_adr); printk(KERN_ERR "%s: Chip not ready for buffer write. Xstatus = %lx, status = %lx\n", map->name, Xstatus.x[0], status.x[0]); - goto out; + return ret; } /* Figure out the number of words to write */ @@ -1853,7 +1835,7 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip, chip->state = FL_STATUS; xip_enable(map, chip, cmd_adr); printk(KERN_ERR "%s: buffer write error (status timeout)\n", map->name); - goto out; + return ret; } /* check for errors */ @@ -1866,21 +1848,53 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip, map_write(map, CMD(0x70), cmd_adr); xip_enable(map, chip, cmd_adr); - if (chipstatus & 0x02) { - ret = -EROFS; - } else if (chipstatus & 0x08) { + if (chipstatus & 0x02) + return -EROFS; + + if (chipstatus & 0x08) { printk(KERN_ERR "%s: buffer write error (bad VPP)\n", map->name); - ret = -EIO; - } else { - printk(KERN_ERR "%s: buffer write error (status 0x%lx)\n", map->name, chipstatus); - ret = -EINVAL; + return -EIO; } - goto out; + printk(KERN_ERR "%s: buffer write error (status 0x%lx)\n", map->name, chipstatus); + return -EINVAL; } xip_enable(map, chip, cmd_adr); - out: DISABLE_VPP(map); + return 0; +} + +static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip, + unsigned long adr, const struct kvec **pvec, + unsigned long *pvec_seek, int len) +{ + struct cfi_private *cfi = map->fldrv_priv; + unsigned long cmd_adr; + int ret, wbufsize; + + wbufsize = cfi_interleave(cfi) << cfi->cfiq->MaxBufWriteSize; + adr += chip->start; + cmd_adr = adr & ~(wbufsize - 1); + + /* Sharp LH28F640BF chips need the first address for the + * Page Buffer Program command. See Table 5 of + * LH28F320BF, LH28F640BF, LH28F128BF Series (Appendix FUM00701) */ + if (is_LH28F640BF(cfi)) + cmd_adr = adr; + + mutex_lock(&chip->mutex); + ret = get_chip(map, chip, cmd_adr, FL_WRITING); + if (ret) { + mutex_unlock(&chip->mutex); + return ret; + } + + XIP_INVAL_CACHED_RANGE(map, adr, len); + ENABLE_VPP(map); + + ret = do_write_buffer_locked(map, chip, cmd_adr, adr, pvec, pvec_seek, len); + + DISABLE_VPP(map); put_chip(map, chip, cmd_adr); mutex_unlock(&chip->mutex); return ret; -- 2.50.1