From: Xi Pardee <xi.pardee@linux.intel.com>
To: xi.pardee@linux.intel.com, irenic.rajneesh@gmail.com,
david.e.box@linux.intel.com, ilpo.jarvinen@linux.intel.com,
platform-driver-x86@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org
Subject: [PATCH v2 1/7] platform/x86/intel/pmc: Use __free() in pmc_core_punit_pmt_init()
Date: Wed, 8 Apr 2026 15:21:34 -0700 [thread overview]
Message-ID: <20260408222144.3288928-2-xi.pardee@linux.intel.com> (raw)
In-Reply-To: <20260408222144.3288928-1-xi.pardee@linux.intel.com>
Use scope-based cleanup in pmc_core_punit_pmt_init() instead of manually
freeing. This simplifies the code flow by removing the explicit put call,
making it less error-prone.
Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com>
---
drivers/platform/x86/intel/pmc/core.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/platform/x86/intel/pmc/core.c b/drivers/platform/x86/intel/pmc/core.c
index d91e1ab842d65..c8a92d6235203 100644
--- a/drivers/platform/x86/intel/pmc/core.c
+++ b/drivers/platform/x86/intel/pmc/core.c
@@ -1325,16 +1325,15 @@ static struct telem_endpoint *pmc_core_register_endpoint(struct pci_dev *pcidev,
void pmc_core_punit_pmt_init(struct pmc_dev *pmcdev, u32 *guids)
{
struct telem_endpoint *ep;
- struct pci_dev *pcidev;
- pcidev = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(10, 0));
+ struct pci_dev *pcidev __free(pci_dev_put) = pci_get_domain_bus_and_slot(0, 0,
+ PCI_DEVFN(10, 0));
if (!pcidev) {
dev_err(&pmcdev->pdev->dev, "PUNIT PMT device not found.");
return;
}
ep = pmc_core_register_endpoint(pcidev, guids);
- pci_dev_put(pcidev);
if (IS_ERR(ep)) {
dev_err(&pmcdev->pdev->dev,
"pmc_core: couldn't get DMU telem endpoint %ld",
--
2.43.0
next prev parent reply other threads:[~2026-04-08 22:21 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-08 22:21 [PATCH v2 0/7] Enable NVL support in intel_pmc_core Xi Pardee
2026-04-08 22:21 ` Xi Pardee [this message]
2026-04-08 22:21 ` [PATCH v2 2/7] platform/x86/intel/pmc: Enable PkgC LTR blocking counter Xi Pardee
2026-04-08 22:21 ` [PATCH v2 3/7] platform/x86/intel/pmc: Enable Pkgc blocking residency counter Xi Pardee
2026-04-08 22:21 ` [PATCH v2 4/7] platform/x86/intel/pmc: Use PCI DID for PMC SSRAM device discovery Xi Pardee
2026-04-08 22:21 ` [PATCH v2 5/7] platform/x86/intel/pmc: Add support for variable DMU offsets Xi Pardee
2026-04-08 22:21 ` [PATCH v2 6/7] platform/x86/intel/pmc: Retrieve PMC info only for available PMCs Xi Pardee
2026-04-08 22:21 ` [PATCH v2 7/7] platform/x86/intel/pmc: Add Nova Lake support to intel_pmc_core driver Xi Pardee
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