From: Xi Pardee <xi.pardee@linux.intel.com>
To: xi.pardee@linux.intel.com, irenic.rajneesh@gmail.com,
david.e.box@linux.intel.com, ilpo.jarvinen@linux.intel.com,
platform-driver-x86@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org
Subject: [PATCH v2 3/7] platform/x86/intel/pmc: Enable Pkgc blocking residency counter
Date: Wed, 8 Apr 2026 15:21:36 -0700 [thread overview]
Message-ID: <20260408222144.3288928-4-xi.pardee@linux.intel.com> (raw)
In-Reply-To: <20260408222144.3288928-1-xi.pardee@linux.intel.com>
Enable the Package C-state blocking counter in the PMT telemetry
region. This counter reports the number of 10 µs intervals during
which a Package C-state 10.2/3 entry was blocked for the specified
reasons.
Create a common helper for pmc_core_pkgc_ltr_blocker_show() and
pmc_core_pkgc_blocker_residency_show() as these two functions
share similar logic.
Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com>
---
drivers/platform/x86/intel/pmc/core.c | 40 ++++++++++++++++++++-------
drivers/platform/x86/intel/pmc/core.h | 8 ++++++
2 files changed, 38 insertions(+), 10 deletions(-)
diff --git a/drivers/platform/x86/intel/pmc/core.c b/drivers/platform/x86/intel/pmc/core.c
index 5c519942ec58c..94ae098a155a6 100644
--- a/drivers/platform/x86/intel/pmc/core.c
+++ b/drivers/platform/x86/intel/pmc/core.c
@@ -1071,29 +1071,44 @@ static int pmc_core_die_c6_us_show(struct seq_file *s, void *unused)
}
DEFINE_SHOW_ATTRIBUTE(pmc_core_die_c6_us);
-static int pmc_core_pkgc_ltr_blocker_show(struct seq_file *s, void *unused)
+static int pmc_core_pkgc_counters_show(struct seq_file *s,
+ struct telem_endpoint *ep,
+ u32 offset, const char **counters)
{
- struct pmc_dev *pmcdev = s->private;
- const char **pkgc_ltr_blocker_counters;
unsigned int i;
u32 counter;
int ret;
- pkgc_ltr_blocker_counters = pmcdev->pkgc_ltr_blocker_counters;
- for (i = 0; pkgc_ltr_blocker_counters[i]; i++) {
- ret = pmt_telem_read32(pmcdev->pc_ep,
- pmcdev->pkgc_ltr_blocker_offset + i,
- &counter, 1);
-
+ for (i = 0; counters[i]; i++) {
+ ret = pmt_telem_read32(ep, offset + i, &counter, 1);
if (ret)
return ret;
- seq_printf(s, "%-30s %-30u\n", pkgc_ltr_blocker_counters[i], counter);
+ seq_printf(s, "%-30s %-30u\n", counters[i], counter);
}
return 0;
}
+
+static int pmc_core_pkgc_ltr_blocker_show(struct seq_file *s, void *unused)
+{
+ struct pmc_dev *pmcdev = s->private;
+
+ return pmc_core_pkgc_counters_show(s, pmcdev->pc_ep,
+ pmcdev->pkgc_ltr_blocker_offset,
+ pmcdev->pkgc_ltr_blocker_counters);
+}
DEFINE_SHOW_ATTRIBUTE(pmc_core_pkgc_ltr_blocker);
+static int pmc_core_pkgc_blocker_residency_show(struct seq_file *s, void *unused)
+{
+ struct pmc_dev *pmcdev = s->private;
+
+ return pmc_core_pkgc_counters_show(s, pmcdev->pc_ep,
+ pmcdev->pkgc_blocker_offset,
+ pmcdev->pkgc_blocker_counters);
+}
+DEFINE_SHOW_ATTRIBUTE(pmc_core_pkgc_blocker_residency);
+
static int pmc_core_lpm_latch_mode_show(struct seq_file *s, void *unused)
{
struct pmc_dev *pmcdev = s->private;
@@ -1381,6 +1396,8 @@ void pmc_core_punit_pmt_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_de
pmcdev->pc_ep = ep;
pmcdev->pkgc_ltr_blocker_counters = pmc_dev_info->pkgc_ltr_blocker_counters;
pmcdev->pkgc_ltr_blocker_offset = pmc_dev_info->pkgc_ltr_blocker_offset;
+ pmcdev->pkgc_blocker_counters = pmc_dev_info->pkgc_blocker_counters;
+ pmcdev->pkgc_blocker_offset = pmc_dev_info->pkgc_blocker_offset;
}
}
@@ -1510,6 +1527,9 @@ static void pmc_core_dbgfs_register(struct pmc_dev *pmcdev, struct pmc_dev_info
debugfs_create_file("pkgc_ltr_blocker_show", 0444,
pmcdev->dbgfs_dir, pmcdev,
&pmc_core_pkgc_ltr_blocker_fops);
+ debugfs_create_file("pkgc_blocker_residency_show", 0444,
+ pmcdev->dbgfs_dir, pmcdev,
+ &pmc_core_pkgc_blocker_residency_fops);
}
}
diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/intel/pmc/core.h
index a20aab73c1409..829b1dee3f636 100644
--- a/drivers/platform/x86/intel/pmc/core.h
+++ b/drivers/platform/x86/intel/pmc/core.h
@@ -455,6 +455,8 @@ struct pmc {
*
* @pkgc_ltr_blocker_counters: Array of PKGC LTR blocker counters
* @pkgc_ltr_blocker_offset: Offset to PKGC LTR blockers in telemetry region
+ * @pkgc_blocker_counters: Array of PKGC blocker counters
+ * @pkgc_blocker_offset: Offset to PKGC blocker in telemetry region
*
* pmc_dev contains info about power management controller device.
*/
@@ -480,6 +482,8 @@ struct pmc_dev {
const char **pkgc_ltr_blocker_counters;
u32 pkgc_ltr_blocker_offset;
+ const char **pkgc_blocker_counters;
+ u32 pkgc_blocker_offset;
};
enum pmc_index {
@@ -495,6 +499,7 @@ enum pmc_index {
* @dmu_guids: List of Die Management Unit GUID
* @pc_guid: GUID for telemetry region to read PKGC blocker info
* @pkgc_ltr_blocker_offset: Offset to PKGC LTR blockers in telemetry region
+ * @pkgc_blocker_offset:Offset to PKGC blocker in telemetry region
* @regmap_list: Pointer to a list of pmc_info structure that could be
* available for the platform. When set, this field implies
* SSRAM support.
@@ -502,6 +507,7 @@ enum pmc_index {
* specific attributes of the primary PMC
* @sub_req_show: File operations to show substate requirements
* @pkgc_ltr_blocker_counters: Array of PKGC LTR blocker counters
+ * @pkgc_blocker_counters: Array of PKGC blocker counters
* @suspend: Function to perform platform specific suspend
* @resume: Function to perform platform specific resume
* @init: Function to perform platform specific init action
@@ -512,10 +518,12 @@ struct pmc_dev_info {
u32 *dmu_guids;
u32 pc_guid;
u32 pkgc_ltr_blocker_offset;
+ u32 pkgc_blocker_offset;
struct pmc_info *regmap_list;
const struct pmc_reg_map *map;
const struct file_operations *sub_req_show;
const char **pkgc_ltr_blocker_counters;
+ const char **pkgc_blocker_counters;
void (*suspend)(struct pmc_dev *pmcdev);
int (*resume)(struct pmc_dev *pmcdev);
int (*init)(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_info);
--
2.43.0
next prev parent reply other threads:[~2026-04-08 22:21 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-08 22:21 [PATCH v2 0/7] Enable NVL support in intel_pmc_core Xi Pardee
2026-04-08 22:21 ` [PATCH v2 1/7] platform/x86/intel/pmc: Use __free() in pmc_core_punit_pmt_init() Xi Pardee
2026-04-08 22:21 ` [PATCH v2 2/7] platform/x86/intel/pmc: Enable PkgC LTR blocking counter Xi Pardee
2026-04-08 22:21 ` Xi Pardee [this message]
2026-04-08 22:21 ` [PATCH v2 4/7] platform/x86/intel/pmc: Use PCI DID for PMC SSRAM device discovery Xi Pardee
2026-04-08 22:21 ` [PATCH v2 5/7] platform/x86/intel/pmc: Add support for variable DMU offsets Xi Pardee
2026-04-08 22:21 ` [PATCH v2 6/7] platform/x86/intel/pmc: Retrieve PMC info only for available PMCs Xi Pardee
2026-04-08 22:21 ` [PATCH v2 7/7] platform/x86/intel/pmc: Add Nova Lake support to intel_pmc_core driver Xi Pardee
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260408222144.3288928-4-xi.pardee@linux.intel.com \
--to=xi.pardee@linux.intel.com \
--cc=david.e.box@linux.intel.com \
--cc=ilpo.jarvinen@linux.intel.com \
--cc=irenic.rajneesh@gmail.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=platform-driver-x86@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox