From: Xi Pardee <xi.pardee@linux.intel.com>
To: xi.pardee@linux.intel.com, irenic.rajneesh@gmail.com,
david.e.box@linux.intel.com, ilpo.jarvinen@linux.intel.com,
platform-driver-x86@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org
Subject: [PATCH v2 5/7] platform/x86/intel/pmc: Add support for variable DMU offsets
Date: Wed, 8 Apr 2026 15:21:38 -0700 [thread overview]
Message-ID: <20260408222144.3288928-6-xi.pardee@linux.intel.com> (raw)
In-Reply-To: <20260408222144.3288928-1-xi.pardee@linux.intel.com>
Add support for handling different DMU Die C6 offsets across platforms.
The previous implementation assumed a uniform DMU Die C6 offset for all
platforms, which is no longer valid.
Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com>
---
drivers/platform/x86/intel/pmc/arl.c | 2 ++
drivers/platform/x86/intel/pmc/core.c | 2 +-
drivers/platform/x86/intel/pmc/core.h | 2 ++
drivers/platform/x86/intel/pmc/mtl.c | 1 +
4 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/platform/x86/intel/pmc/arl.c b/drivers/platform/x86/intel/pmc/arl.c
index 95372a0807acf..4d91ee010f6d0 100644
--- a/drivers/platform/x86/intel/pmc/arl.c
+++ b/drivers/platform/x86/intel/pmc/arl.c
@@ -729,6 +729,7 @@ struct pmc_dev_info arl_pmc_dev = {
.init = arl_core_init,
.sub_req = pmc_core_pmt_get_lpm_req,
.ssram_hidden = true,
+ .die_c6_offset = MTL_PMT_DMU_DIE_C6_OFFSET,
};
static u32 ARL_H_PMT_DMU_GUIDS[] = {ARL_PMT_DMU_GUID, ARL_H_PMT_DMU_GUID, 0x0};
@@ -742,4 +743,5 @@ struct pmc_dev_info arl_h_pmc_dev = {
.init = arl_h_core_init,
.sub_req = pmc_core_pmt_get_lpm_req,
.ssram_hidden = true,
+ .die_c6_offset = MTL_PMT_DMU_DIE_C6_OFFSET,
};
diff --git a/drivers/platform/x86/intel/pmc/core.c b/drivers/platform/x86/intel/pmc/core.c
index e0ac329e6723a..5d2e2681b0eba 100644
--- a/drivers/platform/x86/intel/pmc/core.c
+++ b/drivers/platform/x86/intel/pmc/core.c
@@ -1381,7 +1381,7 @@ void pmc_core_punit_pmt_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_de
}
pmcdev->punit_ep = ep;
- pmcdev->die_c6_offset = MTL_PMT_DMU_DIE_C6_OFFSET;
+ pmcdev->die_c6_offset = pmc_dev_info->die_c6_offset;
}
if (pmc_dev_info->pc_guid) {
diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/intel/pmc/core.h
index f385a0eccd2c2..ef69de160ffbc 100644
--- a/drivers/platform/x86/intel/pmc/core.h
+++ b/drivers/platform/x86/intel/pmc/core.h
@@ -514,6 +514,7 @@ enum pmc_index {
* @init: Function to perform platform specific init action
* @sub_req: Function to achieve low power mode substate requirements
* @ssram_hidden: Some SSRAM devices are hidden on this platform
+ * @die_c6_offset: Telemetry offset to read Die C6 residency
*/
struct pmc_dev_info {
u32 *dmu_guids;
@@ -530,6 +531,7 @@ struct pmc_dev_info {
int (*init)(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_info);
int (*sub_req)(struct pmc_dev *pmcdev, struct pmc *pmc, struct telem_endpoint *ep);
bool ssram_hidden;
+ u32 die_c6_offset;
};
extern const struct pmc_bit_map msr_map[];
diff --git a/drivers/platform/x86/intel/pmc/mtl.c b/drivers/platform/x86/intel/pmc/mtl.c
index 193ebbe584023..b724dd8c34dba 100644
--- a/drivers/platform/x86/intel/pmc/mtl.c
+++ b/drivers/platform/x86/intel/pmc/mtl.c
@@ -1003,4 +1003,5 @@ struct pmc_dev_info mtl_pmc_dev = {
.init = mtl_core_init,
.sub_req = pmc_core_pmt_get_lpm_req,
.ssram_hidden = true,
+ .die_c6_offset = MTL_PMT_DMU_DIE_C6_OFFSET,
};
--
2.43.0
next prev parent reply other threads:[~2026-04-08 22:21 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-08 22:21 [PATCH v2 0/7] Enable NVL support in intel_pmc_core Xi Pardee
2026-04-08 22:21 ` [PATCH v2 1/7] platform/x86/intel/pmc: Use __free() in pmc_core_punit_pmt_init() Xi Pardee
2026-04-08 22:21 ` [PATCH v2 2/7] platform/x86/intel/pmc: Enable PkgC LTR blocking counter Xi Pardee
2026-04-08 22:21 ` [PATCH v2 3/7] platform/x86/intel/pmc: Enable Pkgc blocking residency counter Xi Pardee
2026-04-08 22:21 ` [PATCH v2 4/7] platform/x86/intel/pmc: Use PCI DID for PMC SSRAM device discovery Xi Pardee
2026-04-08 22:21 ` Xi Pardee [this message]
2026-04-08 22:21 ` [PATCH v2 6/7] platform/x86/intel/pmc: Retrieve PMC info only for available PMCs Xi Pardee
2026-04-08 22:21 ` [PATCH v2 7/7] platform/x86/intel/pmc: Add Nova Lake support to intel_pmc_core driver Xi Pardee
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