[PATCH v4 04/10] iommu/arm-smmu-v3: Pass in IOTLB cache tag to arm_smmu_master_build_invs()

Nicolin Chen
2026-03-19T19:52:29Z

Now struct arm_smmu_attach_state carrys an IOTLB cache tag in invst->tag.

Instead of getting the tag from smmu_domain again, pass in the invst->tag
to arm_smmu_master_build_invs(). This could simplify the function.

Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 37 ++++++++-------------
1 file changed, 13 insertions(+), 24 deletions(-)

diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index 29b1310786244..9c23beb8a2545 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -3335,7 +3335,8 @@ arm_smmu_master_build_inv(struct arm_smmu_master *master,
*/
static struct arm_smmu_invs *
arm_smmu_master_build_invs(struct arm_smmu_master *master, bool ats_enabled,
- ioasid_t ssid, struct arm_smmu_domain *smmu_domain)
+ ioasid_t ssid, struct arm_smmu_domain *smmu_domain,
+ struct arm_smmu_inv *tag)
{
const bool nesting = smmu_domain->nest_parent;
size_t pgsize = 0, i;
@@ -3348,30 +3349,15 @@ arm_smmu_master_build_invs(struct arm_smmu_master *master, bool ats_enabled,
if (master->smmu->features & ARM_SMMU_FEAT_RANGE_INV)
pgsize = __ffs(smmu_domain->domain.pgsize_bitmap);

- switch (smmu_domain->stage) {
- case ARM_SMMU_DOMAIN_SVA:
- case ARM_SMMU_DOMAIN_S1:
- if (!arm_smmu_master_build_inv(master, INV_TYPE_S1_ASID,
- smmu_domain->cd.asid,
- IOMMU_NO_PASID, pgsize))
- return NULL;
- break;
- case ARM_SMMU_DOMAIN_S2:
- if (!arm_smmu_master_build_inv(master, INV_TYPE_S2_VMID,
- smmu_domain->s2_cfg.vmid,
- IOMMU_NO_PASID, pgsize))
- return NULL;
- break;
- default:
- WARN_ON(true);
+ if (!arm_smmu_master_build_inv(master, tag->type, tag->id,
+ IOMMU_NO_PASID, pgsize))
return NULL;
- }

/* All the nested S1 ASIDs have to be flushed when S2 parent changes */
if (nesting) {
- if (!arm_smmu_master_build_inv(
- master, INV_TYPE_S2_VMID_S1_CLEAR,
- smmu_domain->s2_cfg.vmid, IOMMU_NO_PASID, 0))
+ if (!arm_smmu_master_build_inv(master,
+ INV_TYPE_S2_VMID_S1_CLEAR,
+ tag->id, IOMMU_NO_PASID, 0))
return NULL;
}

@@ -3462,8 +3448,10 @@ static int arm_smmu_attach_prepare_invs(struct arm_smmu_attach_state *state,
if (ret)
return ret;

- build_invs = arm_smmu_master_build_invs(
- master, state->ats_enabled, ssid, new_smmu_domain);
+ build_invs = arm_smmu_master_build_invs(master,
+ state->ats_enabled,
+ ssid, new_smmu_domain,
+ &invst->tag);
if (!build_invs)
return -EINVAL;

@@ -3492,7 +3480,8 @@ static int arm_smmu_attach_prepare_invs(struct arm_smmu_attach_state *state,

/* For old_smmu_domain, new_invs points to master->build_invs */
invst->new_invs = arm_smmu_master_build_invs(
- master, master->ats_enabled, ssid, old_smmu_domain);
+ master, master->ats_enabled, ssid, old_smmu_domain,
+ &invst->tag);
}

return 0;
--
2.43.0