From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 018413BBA17; Mon, 13 Apr 2026 12:33:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776083611; cv=none; b=VQrGZF6fTPeUWHRAfvJhUPIIZBrySf4PosfdXWq9DzMHdYM4v8X2sCvUQvEGXxcc4BputJ96N8TxOPHXY8dLd2er4skEBGjAshQNepgzhpaLZRpYc8MDnV18EsdESvW4Edxiki9IHJ6h/ma986TVp8TJMlqJbhZ3pmlgPlqRUr0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776083611; c=relaxed/simple; bh=UbDfM/GxSDcj6cq2REF6peE9vw8ahQW3H/hw/MykbRE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=SnQyUKKBl7TUV1PYRVTq2EhYNV6486tPoIMB/eIZbk2MDkSMVR589Oxsj7cZBCasXiGxg2AMIbiRUvidrZeohzDlBZcYZ57LYD6RATbkcAgY5wAjtCU/QYJ2RMnqd+FJNiFp8GSWHtgVdlZ7ydhkl7FP08uvE9fei0nwu6yDCCw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=a2DN5l/f; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="a2DN5l/f" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7E11BC2BCB1; Mon, 13 Apr 2026 12:33:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1776083610; bh=UbDfM/GxSDcj6cq2REF6peE9vw8ahQW3H/hw/MykbRE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=a2DN5l/f5tHlHQwcBO1st0Pq/3kkzqs8fSMr6BLlrcYhZYQUbHeNxIZqAz/Vhr2Ff ukgmmPUZyuKRTKTz9yf1StrPpNGjlCf5pg8/1uY7B2wDNHivQ4zVQ3zCyV3X7LsWJD hc0LbaB373eGP1lDW72zvgfd6xd+V5pr9vMeo35OImHuO3BiQ75gdfroJ1DZerDmTP LlhBeHvlZkha2+zUuQ3n+OzBfAZYj7lfNl1/ehXYqdXNog1yFMhk6E3hTn+sSk1int j/ysQ4JXyaFCV6rrHAH9+iZCQWliriJ+f6BNTrBfk4jap/sH2RDNKURHKs28rYr+Vm jPtT6xyNVA1FQ== From: Puranjay Mohan To: bpf@vger.kernel.org Cc: Puranjay Mohan , Alexei Starovoitov , Daniel Borkmann , Andrii Nakryiko , Martin KaFai Lau , Eduard Zingerman , Kumar Kartikeya Dwivedi , Song Liu , Yonghong Song , Jiri Olsa , Xu Kuohai , Catalin Marinas , Will Deacon , Luke Nelson , Xi Wang , =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= , Pu Lehui , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , linux-arm-kernel@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH bpf-next 1/2] bpf, arm64: Remove redundant bpf_flush_icache() after pack allocator finalize Date: Mon, 13 Apr 2026 05:32:54 -0700 Message-ID: <20260413123256.3296452-2-puranjay@kernel.org> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260413123256.3296452-1-puranjay@kernel.org> References: <20260413123256.3296452-1-puranjay@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit bpf_flush_icache() calls flush_icache_range() to clean the data cache and invalidate the instruction cache for the JITed code region. However, since commit 1dad391daef1 ("bpf, arm64: use bpf_prog_pack for memory management"), this flush is redundant. bpf_jit_binary_pack_finalize() copies the JITed instructions to the ROX region via bpf_arch_text_copy() -> aarch64_insn_copy() -> __text_poke(), and __text_poke() already calls flush_icache_range() on the written range. The subsequent bpf_flush_icache() repeats the same cache maintenance on an overlapping range, including an unnecessary second synchronous IPI to all CPUs via kick_all_cpus_sync(). Remove the redundant bpf_flush_icache() call and its now-unused definition. Fixes: 1dad391daef1 ("bpf, arm64: use bpf_prog_pack for memory management") Signed-off-by: Puranjay Mohan --- arch/arm64/net/bpf_jit_comp.c | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/arch/arm64/net/bpf_jit_comp.c b/arch/arm64/net/bpf_jit_comp.c index adf84962d579..e88b0917adec 100644 --- a/arch/arm64/net/bpf_jit_comp.c +++ b/arch/arm64/net/bpf_jit_comp.c @@ -1961,11 +1961,6 @@ static int validate_ctx(struct jit_ctx *ctx) return 0; } -static inline void bpf_flush_icache(void *start, void *end) -{ - flush_icache_range((unsigned long)start, (unsigned long)end); -} - static void priv_stack_init_guard(void __percpu *priv_stack_ptr, int alloc_size) { int cpu, underflow_idx = (alloc_size - PRIV_STACK_GUARD_SZ) >> 3; @@ -2204,12 +2199,6 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) prog = orig_prog; goto out_off; } - /* - * The instructions have now been copied to the ROX region from - * where they will execute. Now the data cache has to be cleaned to - * the PoU and the I-cache has to be invalidated for the VAs. - */ - bpf_flush_icache(ro_header, ctx.ro_image + ctx.idx); } else { jit_data->ctx = ctx; jit_data->ro_image = ro_image_ptr; -- 2.52.0