From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5A02630B50A; Wed, 15 Apr 2026 02:15:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776219306; cv=none; b=f4qHq0jyFoBumJzKeYIO8sTWOiL/emp2YrgB5jqxGdU/fuR/h+kwWi0chd2zBtGVwTuhJmyLs59rwKg7Oog4vpQ+NQwx4lsQI8DWggEV4dFJWX4hZAKJKJiKZT/eoXvxKVPtu5hlgv1e6eD6fqUs/TdFZPJaKfSt1CySuF4s+qg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776219306; c=relaxed/simple; bh=MvDxloQ6Fyt1J6cOnSsKwQh70Dg9SO1GZDlg7UWlqHY=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=q3iZNTUBWaH50EROdywOMLqUPXG3pZjSO3im4gd7zjvU6OsOTcYHlhyqMx8G3U1xhb9qjIMEU/ysy1dqQ67jeuMS7q+DynnsE2YDCqJ6xquIneENQ0navii+sMTZA/7dbrmfxS8xEUTzEbXZDhsskGnaFcZBrwkzPc4f/ffJiZw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=ibFiHlJ0; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ibFiHlJ0" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1776219305; x=1807755305; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=MvDxloQ6Fyt1J6cOnSsKwQh70Dg9SO1GZDlg7UWlqHY=; b=ibFiHlJ07+psN/wXPqspqRZuABtk8XLF7Aq0MiLrozdSvXf1MIXYVHDa Dno+4s5UqQD4JDCpdV4KT84DXAXPfEdtC7patR/bHVQDy82L6iZ6giSqz bdTbL4XhiVGBSE3urV3PUvXpcEWfx1YvImUiiXj3rDEF52+hOuEpV30nm axkE5F5Ih1jsiC4WPI3xmLicU8pkRM5guIU/UfaVgKV8r4KZd7p4QJ51T OIGoL9F9gZJ3TxxX6QCddkkyHIgXfk5ih1mryjrkioeIs1IMyNnWsA8RD PXTS2Poh3vvlmyYXL73uoHE4oYaFQu9f10hS+8+khCsbce543x1gaHJKL w==; X-CSE-ConnectionGUID: zeiJz8SsTm2guqLeXRxFPw== X-CSE-MsgGUID: t3N3VV1MTfW+Wk05RH3saQ== X-IronPort-AV: E=McAfee;i="6800,10657,11759"; a="77064762" X-IronPort-AV: E=Sophos;i="6.23,179,1770624000"; d="scan'208";a="77064762" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Apr 2026 19:15:04 -0700 X-CSE-ConnectionGUID: lnWvvHInSMCicH/rlMIxig== X-CSE-MsgGUID: ZJb+0GsURmWiSSjwx6OMZA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,179,1770624000"; d="scan'208";a="235221598" Received: from spr.sh.intel.com ([10.112.229.196]) by orviesa005.jf.intel.com with ESMTP; 14 Apr 2026 19:14:59 -0700 From: Dapeng Mi To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Alexander Shishkin , Andi Kleen , Eranian Stephane Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Dapeng Mi , Zide Chen , Falcon Thomas , Xudong Hao , Dapeng Mi , stable@vger.kernel.org Subject: [PATCH] perf/x86/intel: Remove anythread_deprecated bit from perf_capabilities Date: Wed, 15 Apr 2026 10:10:10 +0800 Message-Id: <20260415021010.1248083-1-dapeng1.mi@linux.intel.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit AnyThread mode deprecation is enumerated by CPUID.0AH:EDX[15] instead of PERF_CAPABILITIES MSR. It's not a good practice to define a bit to represent "anythread deprecation" in perf_capabilities. It leads to the anythread_deprecated bit could be overwritten by the real value of PERF_CAPABILITIES MSR, just like the below code in update_pmu_cap() does. ``` if (!intel_pmu_broken_perf_cap()) { /* Perf Metric (Bit 15) and PEBS via PT (Bit 16) are hybrid enumeration */ rdmsrq(MSR_IA32_PERF_CAPABILITIES, hybrid(pmu, intel_cap).capabilities); } ``` It leads to the anythread_deprecated bit is cleared to 0 and the "any" attribute is incorrectly shown in the /sys/devices/cpu/format/ folder on these support Perfmon v6 platforms, like Clearwater Forest. ``` $grep . /sys/devices/cpu/format/* /sys/devices/cpu/format/acr_mask:config2:0-63 /sys/devices/cpu/format/any:config:21 /sys/devices/cpu/format/cmask:config:24-31 ``` So remove the anythread_deprecated bit from perf_capabilities structure and directly depends on CPUID.0AH:EDX[15] to judge if anythread is deprecated. Cc: stable@vger.kernel.org Reported-by: Namhyung Kim Fixes: cadbaa039b99 ("perf/x86/intel: Make anythread filter support conditional") Acked-by: Namhyung Kim Signed-off-by: Dapeng Mi --- arch/x86/events/intel/core.c | 9 +++------ arch/x86/events/perf_event.h | 2 +- 2 files changed, 4 insertions(+), 7 deletions(-) diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 793335c3ce78..450c63165a22 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -7612,11 +7612,8 @@ __init int intel_pmu_init(void) x86_add_quirk(intel_arch_events_quirk); /* Install first, so it runs last */ - if (version >= 5) { - x86_pmu.intel_cap.anythread_deprecated = edx.split.anythread_deprecated; - if (x86_pmu.intel_cap.anythread_deprecated) - pr_cont(" AnyThread deprecated, "); - } + if (version >= 5 && edx.split.anythread_deprecated) + pr_cont(" AnyThread deprecated, "); /* The perf side of core PMU is ready to support the mediated vPMU. */ x86_get_pmu(smp_processor_id())->capabilities |= PERF_PMU_CAP_MEDIATED_VPMU; @@ -8467,7 +8464,7 @@ __init int intel_pmu_init(void) &x86_pmu.intel_ctrl); /* AnyThread may be deprecated on arch perfmon v5 or later */ - if (x86_pmu.intel_cap.anythread_deprecated) + if (edx.split.anythread_deprecated) x86_pmu.format_attrs = intel_arch_formats_attr; intel_pmu_check_event_constraints_all(NULL); diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h index fad87d3c8b2c..01217c663dff 100644 --- a/arch/x86/events/perf_event.h +++ b/arch/x86/events/perf_event.h @@ -660,7 +660,7 @@ union perf_capabilities { u64 perf_metrics:1; u64 pebs_output_pt_available:1; u64 pebs_timing_info:1; - u64 anythread_deprecated:1; + u64 __reserved:1; u64 rdpmc_metrics_clear:1; }; u64 capabilities; -- 2.34.1