From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D03DE1DC198 for ; Thu, 16 Apr 2026 17:57:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776362237; cv=none; b=mfD2kpL+Cy5wmLeNiUdQxfCYdzCIZII40Bvv7REac0xL9i2GI1n2U4kxNoHSde6afhXoWJMAxr+t0QB40U2cecHMp+4Th6649shKr9Qe02f3EARkykanyRmr8DrNxLVVtb45f5xTiCFKKyRWL0nAU9GPD5fP/xWeevyQNpAmf5Q= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776362237; c=relaxed/simple; bh=sJY3VobxGecL25YciXHTjzMGpjAyw94lPfU95UScldc=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=Ez5L1/5DRTkY/BmEzZrkMesjD4COm523kZPNk7GjL+Js6KH1+Uw91hAFmMPcafPrLqQ2IrGbGFNuvVR/wRKF3d15PKz/zkipp/JbnOccPtlIEWhgcPt434ctpUTD2cP/ZOWRy9UmLzXH0ahziGlpdfpO09Ess4NASYg+HHKJxsc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=GBf1NVXk; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="GBf1NVXk" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1776362235; x=1807898235; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=sJY3VobxGecL25YciXHTjzMGpjAyw94lPfU95UScldc=; b=GBf1NVXkZVeA58CEp6+TYIEhEHpcf65m0nLrXfiALZgn1LW3C5y/3IB9 7hoDFMEQ5zZlbUqePlyIiM5tch4yIktSAxEc6pfXR43gHWk/ftwK6zFfq LenRSo9w1ZNXcnFPBDTwA+U3C4AZ0qS4d39oEo4dtk/oE91Fz/AWjPSS5 VupPFZ+t4Gve0mqseZZ0fzCHEIKzMirFpRqRiYSoA7lyb/yzyvGmZUIcT hyAZpH5snNHD8iSZu9DGkRsaia9bcCOqe9WdRvfy0P944YN/iSNQ0AKhW c3fH7QGeauIA/w913V0KM7Q/+LH3qIaxd4YamatiWZy0400K75+mfV2Ar g==; X-CSE-ConnectionGUID: KgJN2MaQTVejnj3MtHqNgg== X-CSE-MsgGUID: eYeivi33RqGUWKoVzNopzw== X-IronPort-AV: E=McAfee;i="6800,10657,11761"; a="94778340" X-IronPort-AV: E=Sophos;i="6.23,181,1770624000"; d="scan'208";a="94778340" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Apr 2026 10:57:15 -0700 X-CSE-ConnectionGUID: 9mx/vetfRXK9+N4L/3kUIw== X-CSE-MsgGUID: aFK8giJ/RBuj7/RM4WTLlw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,181,1770624000"; d="scan'208";a="235784462" Received: from abityuts-desk.ger.corp.intel.com (HELO ahunter6-desk) ([10.245.244.222]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Apr 2026 10:57:14 -0700 From: Adrian Hunter To: alexandre.belloni@bootlin.com Cc: Frank.Li@nxp.com, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 00/16] i3c: mipi-i3c-hci: DMA abort, recovery and related improvements Date: Thu, 16 Apr 2026 20:56:48 +0300 Message-ID: <20260416175704.41217-1-adrian.hunter@intel.com> X-Mailer: git-send-email 2.51.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Content-Transfer-Encoding: 8bit Hi This series improves the robustness of the MIPI I3C HCI DMA mode driver, addressing issues observed during error handling and recovery. Patch 1 ensures suspend always invokes io->suspend. Patches 2-4 fix issues in the existing DMA abort path: preserving the RUN bit during abort per the MIPI specification, blocking enqueue during abort/error, and waiting for ring restart completion. Patches 5-8 improve how partially completed transfer lists are handled during dequeue: moving hci_dma_xfer_done() earlier so completed responses are processed before NoOp replacement, completing transfer lists immediately on error rather than deferring, and detecting when an abort races with transfer completion to avoid restarting the wrong transfer list. Patches 9-10 add Intel-specific quirks for DMA ring abort: a PIO queue reset after abort, and an HC_CONTROL ABORT before the ring-level abort. Patch 11 factors out a reset-and-restore helper from the suspend path for reuse. Patch 12 adds a full DMA recovery path for internal controller errors. When the hardware reports a TID mismatch or the ring becomes stuck, the driver now resets and restores the controller, terminating all in-flight transfers with an error status. Patch 13 makes NoOp command handling observable: instead of discarding NoOp responses, the driver now waits for them to complete and triggers recovery if they fail. Patch 14 adjusts transfer timeout accounting to start from when a transfer actually begins execution rather than when it was queued, preventing premature timeouts behind slow predecessors. Patches 15-16 are minor optimizations: consolidating the DMA command and response ring into a single coherent allocation, and increasing the ring size to the maximum 255 entries to avoid ring-space exhaustion. Adrian Hunter (16): i3c: mipi-i3c-hci: Fix suspend behavior when bus disable falls back to software reset i3c: mipi-i3c-hci: Preserve RUN bit when aborting DMA ring i3c: mipi-i3c-hci: Prevent DMA enqueue while ring is aborting or in error i3c: mipi-i3c-hci: Wait for DMA ring restart to complete i3c: mipi-i3c-hci: Move hci_dma_xfer_done() definition i3c: mipi-i3c-hci: Call hci_dma_xfer_done() from dequeue path i3c: mipi-i3c-hci: Complete transfer lists immediately on error i3c: mipi-i3c-hci: Avoid restarting DMA ring after aborting wrong transfer i3c: mipi-i3c-hci: Add DMA ring abort/reset quirk for Intel controllers i3c: mipi-i3c-hci: Add DMA ring abort quirk for Intel controllers i3c: mipi-i3c-hci: Factor out reset-and-restore helper i3c: mipi-i3c-hci: Add DMA-mode recovery for internal controller errors i3c: mipi-i3c-hci: Wait for NoOp commands to complete i3c: mipi-i3c-hci: Base timeouts on actual transfer start time i3c: mipi-i3c-hci: Consolidate DMA ring allocation i3c: mipi-i3c-hci: Increase DMA transfer ring size to maximum drivers/i3c/master/mipi-i3c-hci/cmd.h | 6 + drivers/i3c/master/mipi-i3c-hci/core.c | 83 +++++++-- drivers/i3c/master/mipi-i3c-hci/dma.c | 332 +++++++++++++++++++++++++-------- drivers/i3c/master/mipi-i3c-hci/hci.h | 22 +++ drivers/i3c/master/mipi-i3c-hci/pio.c | 3 + 5 files changed, 358 insertions(+), 88 deletions(-) Regards Adrian