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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Emil Renner Berthing , Rob Herring , Krzysztof Kozlowski , Conor Dooley , netdev@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, devicetree@vger.kernel.org, Minda Chen Subject: [net-next v2 4/5] net: stmmac: starfive: Add JHB100 SGMII interface Date: Fri, 17 Apr 2026 10:45:22 +0800 Message-Id: <20260417024523.107786-5-minda.chen@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20260417024523.107786-1-minda.chen@starfivetech.com> References: <20260417024523.107786-1-minda.chen@starfivetech.com> Content-Type: text/plain X-ClientProxiedBy: ZQ0PR01CA0036.CHNPR01.prod.partner.outlook.cn (2406:e500:c550:2::20) To BJXPR01MB0855.CHNPR01.prod.partner.outlook.cn (2406:e500:c211:18::12) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BJXPR01MB0855:EE_|BJXPR01MB0517:EE_ X-MS-Office365-Filtering-Correlation-Id: b966f87e-01e0-43aa-878d-08de9c2b674f X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014|7416014|52116014|921020|56012099003|22082099003|18002099003|38350700014; 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JHB100 soc contains 2 SGMII interfaces and integrated with serdes PHY. SGMII with split TX/RX MAC clock and need to set 2.5M/25M/125M TX/RX clock rate in 10M/100M/1000M speed mode. Signed-off-by: Minda Chen --- .../ethernet/stmicro/stmmac/dwmac-starfive.c | 54 ++++++++++++++----- 1 file changed, 42 insertions(+), 12 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c index 16b955a6d77b..91698c763dac 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c @@ -26,6 +26,7 @@ struct starfive_dwmac_data { struct starfive_dwmac { struct device *dev; const struct starfive_dwmac_data *data; + struct clk *sgmii_rx; }; static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat) @@ -68,6 +69,24 @@ static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat) return 0; } +static int stmmac_starfive_sgmii_set_clk_rate(void *bsp_priv, struct clk *clk_tx_i, + phy_interface_t interface, int speed) +{ + struct starfive_dwmac *dwmac = (void *)bsp_priv; + long rate = rgmii_clock(speed); + int ret; + + /* MAC clock rate the same as RGMII */ + if (rate < 0) + return 0; + + ret = clk_set_rate(clk_tx_i, rate); + if (ret) + return ret; + + return clk_set_rate(dwmac->sgmii_rx, rate); +} + static int starfive_dwmac_probe(struct platform_device *pdev) { struct plat_stmmacenet_data *plat_dat; @@ -102,24 +121,34 @@ static int starfive_dwmac_probe(struct platform_device *pdev) return dev_err_probe(&pdev->dev, PTR_ERR(clk_gtx), "error getting gtx clock\n"); - /* Generally, the rgmii_tx clock is provided by the internal clock, - * which needs to match the corresponding clock frequency according - * to different speeds. If the rgmii_tx clock is provided by the - * external rgmii_rxin, there is no need to configure the clock - * internally, because rgmii_rxin will be adaptively adjusted. - */ - if (!device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk")) - plat_dat->set_clk_tx_rate = stmmac_set_clk_tx_rate; + if (plat_dat->phy_interface == PHY_INTERFACE_MODE_SGMII) { + dwmac->sgmii_rx = devm_clk_get_enabled(&pdev->dev, "sgmii_rx"); + if (IS_ERR(dwmac->sgmii_rx)) + return dev_err_probe(&pdev->dev, + PTR_ERR(dwmac->sgmii_rx), + "error getting sgmii rx clock\n"); + plat_dat->set_clk_tx_rate = stmmac_starfive_sgmii_set_clk_rate; + } else { + /* + * Generally, the rgmii_tx clock is provided by the internal clock, + * which needs to match the corresponding clock frequency according + * to different speeds. If the rgmii_tx clock is provided by the + * external rgmii_rxin, there is no need to configure the clock + * internally, because rgmii_rxin will be adaptively adjusted. + */ + if (!device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk")) + plat_dat->set_clk_tx_rate = stmmac_set_clk_tx_rate; + + err = starfive_dwmac_set_mode(plat_dat); + if (err) + return err; + } dwmac->dev = &pdev->dev; plat_dat->flags |= STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP; plat_dat->bsp_priv = dwmac; plat_dat->dma_cfg->dche = true; - err = starfive_dwmac_set_mode(plat_dat); - if (err) - return err; - return stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); } @@ -130,6 +159,7 @@ static const struct starfive_dwmac_data jh7100_data = { static const struct of_device_id starfive_dwmac_match[] = { { .compatible = "starfive,jh7100-dwmac", .data = &jh7100_data }, { .compatible = "starfive,jh7110-dwmac" }, + { .compatible = "starfive,jhb100-dwmac" }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, starfive_dwmac_match); -- 2.17.1