From: Robby Cai <robby.cai@nxp.com>
To: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Frank.Li@nxp.com, s.hauer@pengutronix.de, festevam@gmail.com,
krzk+dt@kernel.org, andrew.smirnov@gmail.com,
kernel@pengutronix.de, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, aisheng.dong@nxp.com,
guoniu.zhou@nxp.com
Subject: Re: [PATCH v2 1/1] reset: imx7: Correct polarity of MIPI CSI resets on i.MX8MQ
Date: Fri, 17 Apr 2026 17:28:09 +0800 [thread overview]
Message-ID: <20260417092809.GA582835@shlinux88> (raw)
In-Reply-To: <2605c4332e8a3e8950b0b15fc5377423cfed4a1f.camel@pengutronix.de>
On Fri, Apr 17, 2026 at 10:47:48AM +0200, Philipp Zabel wrote:
> On Fr, 2026-04-17 at 16:08 +0800, Robby Cai wrote:
> > On i.MX8MQ, the MIPI CSI reset lines are active-low and not self-clearing.
> > Writing '0' asserts reset and it remains asserted until explicitly
> > deasserted by software.
> >
> > This driver previously treated the MIPI CSI reset signals as active-high,
> > which led to incorrect reset assert/deassert sequencing. This issue was
> > exposed by commit 6d79bb8fd2aa ("media: imx8mq-mipi-csi2: Explicitly
> > release reset").
>
> If this patch is backported without 6d79bb8fd2aa, or the other way
> around, will that break MIPI CSI-2 on older kernels? That would warrant
> a Cc: stable tag.
>
Yes, will break.
These two patches should be backported as a pair to ensure correct behavior.
Regards,
Robby
prev parent reply other threads:[~2026-04-17 9:26 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-17 8:08 [PATCH v2 1/1] reset: imx7: Correct polarity of MIPI CSI resets on i.MX8MQ Robby Cai
2026-04-17 8:47 ` Philipp Zabel
2026-04-17 9:28 ` Robby Cai [this message]
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