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[82.69.66.36]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-43fe4cb135asm15915900f8f.6.2026.04.18.09.32.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Apr 2026 09:32:45 -0700 (PDT) Date: Sat, 18 Apr 2026 17:32:44 +0100 From: David Laight To: Thomas =?UTF-8?B?V2Vpw59zY2h1aA==?= Cc: Willy Tarreau , Daniel Palmer , linux-kernel@vger.kernel.org Subject: Re: [PATCH 5/7] tools/nolibc: handle 64-bit system call arguments on MIPS N32 Message-ID: <20260418173244.0f9c970a@pumpkin> In-Reply-To: References: <20260418-nolibc-largefile-v1-0-b91f0775bac3@weissschuh.net> <20260418-nolibc-largefile-v1-5-b91f0775bac3@weissschuh.net> <20260418121442.6ca95de1@pumpkin> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; arm-unknown-linux-gnueabihf) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On Sat, 18 Apr 2026 13:54:55 +0200 Thomas Wei=C3=9Fschuh wrote: > Hey David, >=20 > Apr 18, 2026 13:14:46 David Laight : >=20 > > On Sat, 18 Apr 2026 12:20:00 +0200 > > Thomas Wei=C3=9Fschuh wrote: > > =20 > >> The N32 system call ABI expects 64-bit values directly in registers. > >> This does not work on nolibc currently, as a 'long' is only 32 bits > >> wide. Switch the system call wrappers to use 'long long' instead which > >> can handle 64-bit values on N32. As on N64 'long' and 'long long' are > >> the same, this does not change the behavior there. > >> > >> Signed-off-by: Thomas Wei=C3=9Fschuh > >> --- > >> tools/include/nolibc/arch-mips.h | 94 +++++++++++++++++++++-----------= -------- > >> 1 file changed, 49 insertions(+), 45 deletions(-) > >> > >> diff --git a/tools/include/nolibc/arch-mips.h b/tools/include/nolibc/a= rch-mips.h > >> index bb9d580ea1b1..557ef34d9df8 100644 > >> --- a/tools/include/nolibc/arch-mips.h > >> +++ b/tools/include/nolibc/arch-mips.h > >> @@ -55,6 +55,8 @@ > >> #define _NOLIBC_SYSCALL_STACK_RESERVE "addiu $sp, $sp, -32\n" > >> #define _NOLIBC_SYSCALL_STACK_UNRESERVE "addiu $sp, $sp, 32\n" > >> > >> +#define _NOLIBC_SYSCALL_REG register long > >> + > >> #else /* _ABIN32 || _ABI64 */ > >> > >> /* binutils, GCC and clang disagree about register aliases, use number= s instead. */ > >> @@ -66,12 +68,14 @@ > >> #define _NOLIBC_SYSCALL_STACK_RESERVE > >> #define _NOLIBC_SYSCALL_STACK_UNRESERVE > >> > >> +#define _NOLIBC_SYSCALL_REG register long long > >> + > >> #endif /* _ABIO32 */ =20 > > > > Since you need to use a #define, did you think about: > > #define _NOLIBC_SYSCALL_REG(var, reg) register long long var __asm__ (r= eg) > > to shorten the lines and the repetitive pattern. =20 >=20 > I didn't think of this. > Personally I am fine with both variants. > The parameterized macro is a bit weird > is it breaks the normal syntax. > Let's wait what Willy thinks. Actually you could take it one stage further: #define _NOLIBC_SYSCALL_REG(reg) register long long _##reg __asm__ (#reg) So you'd have: _NOLIBC_SYSCALL_REG(a0) =3D (cast)(arg1); I'd then use "+r" (_v0), "+r" (_a3). For the variables that get pushed use the [name] syntax to avoid counting, they also don't need (well shouldn't need) a local variable - the cast can be included on the asm line. Giving: "sw %[arg5], 16($sp)\n" ... [arg5]"r"((long)(arg5), ... (Does look like those are all 32bit only, so the (long) cast is correct.) David >=20 > >> #define __nolibc_syscall0(num)=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0 \ > >> ({=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 \ > >> -=C2=A0=C2=A0 register long _num __asm__ ("v0") =3D (num);=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= \ > >> -=C2=A0=C2=A0 register long _arg4 __asm__ ("a3");=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 \ > >> +=C2=A0=C2=A0 _NOLIBC_SYSCALL_REG _num __asm__ ("v0")=C2=A0 =3D (num);= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 \ > >> +=C2=A0=C2=A0 _NOLIBC_SYSCALL_REG _arg4 __asm__ ("a3");=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0 \ =20 > > > > =C2=A0=C2=A0=C2=A0 __NOLIBC_SYSCALL_REG(_num, "v0") =3D (num); > > =C2=A0=C2=A0=C2=A0 __NOLIBC_SYSCALL_REG(_arg4, "a3"); > > > > ... > > > > =C2=A0=C2=A0=C2=A0 David =20 >=20 >=20