[PATCH v1 09/20] dt-bindings: pinctrl: Add starfive,jhb100-per0-pinctrl

Changhuang Liang
2026-04-24T11:30:28Z

Add pinctrl bindings for StarFive JHB100 SoC Peripheral-0(per0) pinctrl
controller.

Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
---
.../pinctrl/starfive,jhb100-per0-pinctrl.yaml | 219 ++++++++++++++++++
1 file changed, 219 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/starfive,jhb100-per0-pinctrl.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/starfive,jhb100-per0-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/starfive,jhb100-per0-pinctrl.yaml
new file mode 100644
index 000000000000..b69b9b21cac6
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/starfive,jhb100-per0-pinctrl.yaml
@@ -0,0 +1,219 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/starfive,jhb100-per0-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JHB100 Peripheral-0 Pin Controller
+
+description: |
+ Pinctrl bindings for JHB100 RISC-V SoC from StarFive Technology Ltd.
+
+ The JHB100 SoC has 13 pinctrl domains - sys0, sys0h, sys1, sys2, per0, per1,
+ per2, per2pok, per3, adc0, adc1, emmc, and vga.
+ This document provides an overview of the "per0" pinctrl domain.
+
+ The "per0" domain has a pin controller which provides
+ - function selection for GPIO pads.
+ - GPIO pad configuration.
+ - GPIO interrupt handling.
+
+ In the Peripheral-0 Pin Controller, there are 60 multi-function GPIO_PADs. Each of them
+ can be multiplexed to several hardware blocks through function selection. Each iopad
+ has a maximum of up to 3 functions - 0, 1, and 2. Function 0 is the default function
+ which is generally the GPIO function. Function 1 and 2 are the alternate function or
+ signal of an iopad. The function 1 and function 2 are other optional functions or
+ peripheral signals that can be routed to an iopad. The function selection can be carried
+ out by writing the function number to the iopad function select register.
+ Each iopad is configurable with parameters such as input-enable, internal pull-up/pull-down
+ bias, push-pull/Open-drain mode select, schmitt trigger, open-drain pull-up select,
+ and debounce width.
+
+ This domain contains 4 IO groups which support voltage levels 1.8V and 3.3V
+ gpioe-i3c0 - comprises PAD_GPIO_B8 through PAD_GPIO_B11, PAD_GPIO_B32, and PAD_GPIO_B33.
+ gpioe-i3c1 - comprises PAD_GPIO_B12 through PAD_GPIO_B15, PAD_GPIO_B34, and PAD_GPIO_B35.
+ gpioe-i3c2 - comprises PAD_GPIO_B16 through PAD_GPIO_B23.
+ gpioe-i3c4 - comprises PAD_GPIO_B36 through PAD_GPIO_B43.
+
+ Each of the above IO groups must be configured with a voltage setting that matches the external
+ voltage level provided to the IO group.
+
+maintainers:
+ - Alex Soo <yuklin.soo@starfivetech.com>
+
+properties:
+ compatible:
+ items:
+ - const: starfive,jhb100-per0-pinctrl
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-controller: true
+
+ '#interrupt-cells':
+ const: 2
+
+ gpio-controller: true
+
+ '#gpio-cells':
+ const: 2
+
+ gpio-ranges:
+ maxItems: 1
+
+ gpio-line-names: true
+
+ gpioe-i3c0-vref:
+ description: |
+ Voltage reference value for the IO group "gpioe-i3c0"
+ 0: voltage reference value for 3.3V
+ 2: voltage reference value for 1.8V
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [0, 2]
+ default: 0
+
+ gpioe-i3c1-vref:
+ description: |
+ Voltage reference value for the IO group "gpioe-i3c1"
+ 0: voltage reference value for 3.3V
+ 2: voltage reference value for 1.8V
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [0, 2]
+ default: 0
+
+ gpioe-i3c2-vref:
+ description: |
+ Voltage reference value for the IO group "gpioe-i3c2"
+ 0: voltage reference value for 3.3V
+ 2: voltage reference value for 1.8V
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [0, 2]
+ default: 0
+
+ gpioe-i3c4-vref:
+ description: |
+ Voltage reference value for the IO group "gpioe-i3c4"
+ 0: voltage reference value for 3.3V
+ 2: voltage reference value for 1.8V
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [0, 2]
+ default: 0
+
+patternProperties:
+ '-grp$':
+ type: object
+ additionalProperties: false
+ patternProperties:
+ '-pins$':
+ type: object
+ description: |
+ A pinctrl node should contain at least one subnode representing the
+ pinctrl groups available in the domain. Each subnode will list the
+ pins it needs, and how they should be configured, with regard to
+ function selection, bias, input enable/disable, input schmitt
+ trigger enable/disable, slew-rate and drive strength.
+ allOf:
+ - $ref: /schemas/pinctrl/pincfg-node.yaml
+ - $ref: /schemas/pinctrl/pinmux-node.yaml
+ unevaluatedProperties: false
+
+ properties:
+ pinmux:
+ description: |
+ The list of GPIOs and their function select.
+ The PINMUX macros are used to configure the
+ function selection.
+
+ bias-disable: true
+
+ bias-pull-up:
+ type: boolean
+
+ bias-pull-down:
+ type: boolean
+
+ drive-strength:
+ enum: [ 2, 4, 8, 12 ]
+
+ drive-strength-microamp:
+ enum: [ 2000, 4000, 8000, 12000 ]
+
+ input-enable: true
+
+ input-disable: true
+
+ input-schmitt-enable: true
+
+ input-schmitt-disable: true
+
+ slew-rate:
+ enum: [ 0, 1 ]
+ default: 0
+ description: |
+ 0: slow (half frequency)
+ 1: fast
+
+ starfive,debounce-width:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ default: 0
+ description:
+ Debounce width 0 = Disabled, Others = 80ns*N stages
+
+ starfive,drive-i2c-fast-mode:
+ type: boolean
+ description:
+ Enable I2C fast mode drive
+
+ starfive,drive-i2c-fast-mode-plus:
+ type: boolean
+ description:
+ Enable I2C fast mode plus drive
+
+ starfive,i2c-open-drain-pull-up-ohm:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ open drain pull-up select
+ enum: [600, 900, 1200, 2000]
+ default: 600
+
+required:
+ - compatible
+ - reg
+ - resets
+ - interrupts
+ - interrupt-controller
+ - '#interrupt-cells'
+ - gpio-controller
+ - '#gpio-cells'
+ - gpio-ranges
+
+additionalProperties: false
+
+examples:
+ - |
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ pinctrl_per0: pinctrl@11a0a000 {
+ compatible = "starfive,jhb100-per0-pinctrl";
+ reg = <0x0 0x11a0a000 0x0 0x1000>;
+ resets = <&per0crg 0>;
+ interrupts = <60>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl_per0 0 0 60>;
+ };
+ };
--
2.25.1