Re: [PATCH RFC v3 1/9] dt-bindings: iio: frequency: add ad9910

Rodrigo Alencar
2026-04-26T12:48:07Z

On 26/04/26 12:01PM, Jonathan Cameron wrote:
> On Fri, 17 Apr 2026 09:17:30 +0100
> Rodrigo Alencar via B4 Relay <devnull+rodrigo.alencar.analog.com@kernel.org> wrote:
>
> > From: Rodrigo Alencar <rodrigo.alencar@analog.com>
> >
> > DT-bindings for AD9910, a 1 GSPS DDS with 14-bit DAC. It includes
> > configurations for clocks, DAC current, reset and basic GPIO control.
> >
> > Signed-off-by: Rodrigo Alencar <rodrigo.alencar@analog.com>
> > ---
> > .../bindings/iio/frequency/adi,ad9910.yaml | 189 +++++++++++++++++++++
> > MAINTAINERS | 7 +
> > 2 files changed, 196 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/iio/frequency/adi,ad9910.yaml b/Documentation/devicetree/bindings/iio/frequency/adi,ad9910.yaml
> > new file mode 100644
> > index 000000000000..61e879bca5c2
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/iio/frequency/adi,ad9910.yaml
>
> ...
>
> > +
> > + reset-gpios:
> > + description:
> > + GPIOs controlling the Main Device reset.
> > +
> > + io-reset-gpios:
> > + maxItems: 1
> > + description:
> > + GPIO controlling the I/O_RESET pin.
> > +
> > + powerdown-gpios:
> > + maxItems: 1
> > + description:
> > + GPIO controlling the EXT_PWR_DWN pin.
> > +
> > + update-gpios:
> > + maxItems: 1
> > + description:
> > + GPIO controlling the I/O_UPDATE pin.
> > +
> > + profile-gpios:
> > + minItems: 3
> > + maxItems: 3
> > + description:
> > + GPIOs controlling the PROFILE[2:0] pins for profile selection.
> > +
> > + sync-err-gpios:
> > + maxItems: 1
> > + description:
> > + GPIO used to read SYNC_SMP_ERR pin status.
> Looking at the datasheet there are a few other things that might want to be here.
>
> pll-lock for example might be wired to a gpio to allow a check that lock has
> occurred. Maybe sync-samp-err as well though possibly that one wants to be an
> interrupt?

I can add the lock-detect gpio. sync-samp-err must be a gpio, because it must be
used by a calibration routine that modifies sync delays and reads the gpio value
to check the sync state. The goal is to find the best delay configs. More details:
https://ez.analog.com/cfs-file/__key/communityserver-discussions-components-files/318/3426.Synchronizing-Multiple-AD9910s.pdf

--
Kind regards,

Rodrigo Alencar